Most of this information is now in the arch(7) man page.

On all supported architectures,

<code>
sizeof(short) == 2
sizeof(int) == 4
sizeof(long) == sizeof(void*)
sizeof(long long) == 8
sizeof(float) == 4
sizeof(double) == 8
</code>

Sample code to print type sizes: https://github.com/emaste/snippets/blob/master/sizeof.c

Command line invocation to list predefined macros: ''%%clang -x c -dM -E /dev/null%%''

^ Macro ^ Meaning ^
| ''%%__LP64__%%'' | When defined, conforms to the LP64 programming model: Longs and pointers are 8 bytes, ints are 4 bytes |
| ''%%__ILP32__%%'' | When defined, conforms to the ILP32 programming model: Ints, Longs and Pointers are 4 bytes |
| ''%%BYTE_ORDER%%'' | Either ''%%BIG_ENDIAN%%'' or ''%%LITTLE_ENDIAN%%''. ''%%PDP11_ENDIAN%%'' is not used on %%FreeBSD%% |

^ Architecture ^ sizeof(void *) ^ sizeof(long double) ^ char ^ Endianness ^ Page sizes ^ float ^ double ^ long double ^ Predefined macros  ^
| amd64 | 8 | 16 | signed | little | 4k, 2m, 1g | hard | hard | hard, 80 bit | ''%%__amd64__%%'', ''%%__x86_64__%%'' |
| arm | 4 | 8 | unsigned | little | 4k | soft | soft | soft, double precision | ''%%__arm__%%'' |
| armeb | 4 | 8 | unsigned | big | 4k | soft | soft | soft, double precision | ''%%__arm__%%'' |
| armv6 | 4 | 8 | unsigned | little | 4k | hard | hard | hard, double precision [1] | ''%%__arm__%%'', ''%%__ARM_ARCH >= 6%%'' [2] |
| arm64 | 8 | 16 | unsigned | little | 4k, 2M, 1G | hard | hard | soft, quad precision | ''%%__aarch64__%%'' |
| i386 | 4 | 12 | signed | little | 4k, 2m (PAE), 4m | hard | hard | hard, 80 bit | ''%%__i386__%%'' |
| mips | 4 | 8 | signed | big | 4k | soft[4] | soft[4] | same as double | ''%%__mips__%%'', ''%%__MIPSEB__%%'', ''%%__mips_o32%%'' [3] |
| mipsel | 4 | 8 | signed | little | 4k | soft[4] | soft[4] | same as double | ''%%__mips__%%'', ''%%__mips_o32%%'' [3] |
| mipsn32 | 4 | 8 | signed | big | 4k | soft[4] | soft[4] | same as double | ''%%__mips__%%'', ''%%__MIPSEB__%%'', ''%%__mips_n32%%'' [3] |
| mips64 | 8 | 8 | signed | big | 4k | soft[4] | soft[4] | same as double | ''%%__mips__%%'', ''%%__MIPSEB__%%'',''%%__mips_n64%%'' [3] |
| mips64el | 8 | 8 | signed | little | 4k | soft[4] | soft[4] | same as double | ''%%__mips__%%'', ''%%__mips_n64%%'' [3] |
| powerpc | 4 | 8 | unsigned | big | 4k | hard | hard | hard, double precision | ''%%__powerpc__%%'' |
| powerpc64 | 8 | 8 | unsigned | big | 4k | hard | hard | hard, double precision | ''%%__powerpc__%%'', ''%%__powerpc64__%%'' |
| riscv | 8 |  |  | little | 4k |  |  |  | ''%%__riscv__%%'', ''%%__riscv64%%'' |
| sparc64 | 8 | 16 | signed | big | 8k | hard | hard | hard, quad precision | ''%%__sparc64__%%'' |

^ Architecture ^ Build Status ^
| amd64 | [[https://jenkins.freebsd.org/job/FreeBSD_HEAD|[[https://jenkins.freebsd.org/job/FreeBSD_HEAD/lastCompletedBuild/badge/icon  ]] |
| arm64 | [[https://jenkins.freebsd.org/job/FreeBSD_HEAD_arm64|[[https://jenkins.freebsd.org/job/FreeBSD_HEAD_arm64/lastCompletedBuild/badge/icon  ]] |

  - Prior to %%FreeBSD%% 11, armv6 is built with the softfp ABI by default, it uses hard float, but passed floating-point arguments as soft float, i.e. in integer registers.
  - include %%<%%machine/acle-compat.h> to ensure this is defined on gcc 4.2.1
  - ''%%__mips_o32%%'', ''%%__mips_n32%%'' and ''%%__mips_n64%%'' are ABI flags, not processor flags. We use those flags, however, to differentiate between running in o32 vs n32 vs n64 modes.
  - All mips are currently soft float. Except for some out of tree stuff. Hard float and mips: there be dragons here and it's quite rough seas that can be sailed in a pinch.
===== Links =====
  * [[https://sourceforge.net/p/predef/wiki/Home/|Predefined compiler macros by architecture, OS, etc.]]