CPU Security

Architectural Security Features

SGX
- Ruslan update
- theraven: having paging support in FreeBSD is useful
- GELI
- QEMU, hardware in test cluster perhaps
MKTME - per-page-table encryption
- https://lwn.net/Articles/758313/
- and AMD equivalent
TPM support
- libtrousers
IBT (Indirect Branch Tracking)
- toolchain support: available for amd64 today
- amd64 requires kernel support for alternate permission bits (not in PTEs)
Shadow Stack
- breaks retpoline
- Google thing: xor RA with stack pointer
Pointer Authentication (Arm)
- http://events17.linuxfoundation.org/sites/events/files/slides/slides_23.pdf
- ARMv8.3-A paciasp autiasp
- PAC in previously reserved bits (e.g. 7 or 15 bits)
- auth failure results in invalid pointer (non-canonical)
- Clang support state unknown
- subset are in nop space on previous
- Linux using for PLTGOT
- Return address protection
- can use return address as stack canary
PXN, UXN, PAN, SMAP, SMEP
- arm64, amd64 - believe done?
- RISC-V not yet
- POWER ???
IOMMU use
- who will do it?
Tagged pointers
- research area
- software implementations - high overhead
- may appear in llvm
CHERI
- how do we promote the knowledge that pointers are not integers?
- type-aware copyin/copyout ; clang-generated marshal/unmarshal code