Table of Contents

FreeBSD/ARM and FDT cleanup

Project description

This project aims to clean up and refactor FreeBSD code in the following areas:

  1. FDT support: allow creating multiple buses, including nested buses with sophisticated address translation rules. Allow using multiple interrupt-parents for devices. Add support for flash disk partitioning using “partition” nodes.
  2. Interrupt handling: allow to create multiple interrupt controllers, arrange interrupt controllers hierarchically like them are connected in hardware. Replace flat IRQ list and arm_next_irq(), arm_umask_irq() and arm_mask_irq() functions with NEWBUS-arranged hierarchy of interrupt controllers with each implementing control interface like pic_if.m in powerpc.
  3. Machine initialization: merge all *_machdep.c initialization files into generic as possible code. Separate CPU-specific initialization from board-specific.

Deliverables

  1. Add support for multiple and nested simplebuses to existing FDT implementation
  2. Add support for mapping block device slices in DTS file, representing each slice as device node under /dev.
  3. Identify code responsible for handling IRQ and FIQ interrupts and refactor it to pass interrupts to IC drivers hierarchy. 3a. Separate new interrupt routing code from old code to allow conditional compilation and to not break existing arm ports.
  4. Encapsulate existing pmap/VM initialization code into one generic routine; automagically set up page tables using only physical memory map and pmap_devmap given from machine-dependent code.
  5. Modify arm/lpc port to use new features from deliverables 1..4
  6. Modify arm/ti port to use new features from deliverables 1..4

Milestones

M1: FreeBSD works with DTS file containing multiple and/or nested buses (week 1)

M2: Block device slicing using information contained in DTS files works (week 3)

M3: New interrupt routing code is in place (week 6)

M4: VM/pmap initialization is refactored into generic MI routines (week 8)

M5: Board-specific code is splitted from machine-specific code (week 9)

M6: arm/lpc port is fully switched to refactored code (week 10)

M7: arm/ti port is fully switched to refactored code (week 12)

M8: documentation is in place (week 13)

Test Plan

Functional tests on the following platforms:

The Code

Code repository: http://svn.freebsd.org/base/user/jceel/soc2012_armv6/

ePAPR Device Tree specification: https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf