Verification of Bhyve's instruction emulation

• Student: Sudhanshu Saurav (sudh.cse@gmail.com)
• Mentor: Anish Gupta (anish@freebsd.org)

Test harness for instruction emulation code using Intel XED(x86 encoder decoder) tool.

Bhyve hypervisor that runs guest operating system inside a virtual machine (parameters like the number of virtual CPUs, amount of guest memory and input-output connectivity can be specified with command line parameter). It has a software emulator of a small number of instructions which needs to be tested using Intel XED tools and after decoding it needs to produce a data structure describing the opcode, operands, and flags or vice versa. The main purpose of this project is to provide a test for Bhyve instructions. The tests are a tiny guest operating system that generally executes few lines of C and assembler test code in order to obtain its PASS/FAIL result. This test harness provides FreeBSD and software emulator to check the accuracy of their instructions. It is often used for quick and dirty bug reproducer. I will try to provide simplicity to test harness so that it is easy to verify they are correct, easy to maintain and easy to use in timing measurement. Since this FreeBSD OS supports multiple architectures currently (i386, amd64, ARM, MIPS, PPC, sparc64). I am trying to provide test harness which supports all these architectures. I am creating a test harness for the instructions emulation code using the Intel XED tool which is the software library for encoding and decoding x86(IA-32 instructions set and Intel 64 instructions set) instructions. information and produces a data structure describing the opcode, operands, and flags. From these, we obtain the PASS/FAIL result of the emulation.

-—Test harness

• Test library
• Driver stubs
• Executing test
• Generating report

• Develops system test driver, another supporting tool that requires executing test.
• Develop stubs and driver (small program) to interact with the software under test.
• Design test script to handle different test scenarios and test data.

• May 14th: Start of coding
  • Test harness for small no. of Instructions
• May 21st: Week 2
  • Provide simplicity to test harness
• June 11th - June 15th: Mid-term Evaluations #1
• June 12th: Continue coding
  • Extend for large no. of Instructions
• July 9th - July 13th: Mid-term Evaluations #2
• July Modified test harness to support most of the architectures.
• August 6th: End of coding (soft)
  • Debug and finish code and complete documentation
• August 14th: End of coding (hard)

With the help of Intel XED(x86 encoder-decoder) tool check the correctness of the Instruction

• https://github.com/capreyon/Test-harness-for-bhyve-instruction
• https://github.com/Capreyon/Test_harness

Nothing at the moment

• https://intelxed.github.io/
• https://github.com/intelxed
• https://svnweb.freebsd.org/base/head/sys/amd64/vmm/vmm_instruction_emul.c