/* RSD PTR: OEM=APPLE, ACPI_Rev=2.0x (2) XSDT=0x8ad8e1c0, length=36, cksum=217 */ /* XSDT: Length=164, Revision=1, Checksum=43, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x60, Creator ID=, Creator Revision=0x1000013 Entries={ 0x8ad8c000, 0x8ad8b000, 0x8ad8a000, 0x8ad88000, 0x8ad87000, 0x8ad7e000, 0x8ad7d000, 0x8ad7b000, 0x8ad77000, 0x8ad75000, 0x8ad73000, 0x8ad72000, 0x8ad71000, 0x8ad70000, 0x8ad6f000, 0x8ad89000 } */ /* FACP: Length=244, Revision=4, Checksum=243, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x60, Creator ID=Loki, Creator Revision=0x5f FACS=0x8ad3e000, DSDT=0x8ad81000 INT_MODEL=PIC Preferred_PM_Profile=Mobile (2) SCI_INT=9 SMI_CMD=0xb2, ACPI_ENABLE=0xf0, ACPI_DISABLE=0xf1, S4BIOS_REQ=0x0 PSTATE_CNT=0x0 PM1a_EVT_BLK=0x400-0x403 PM1a_CNT_BLK=0x404-0x405 PM2_CNT_BLK=0x450-0x450 PM_TMR_BLK=0x408-0x40b GPE0_BLK=0x420-0x42f CST_CNT=0x85 P_LVL2_LAT=101 us, P_LVL3_LAT=1001 us FLUSH_SIZE=0, FLUSH_STRIDE=0 DUTY_OFFSET=1, DUTY_WIDTH=3 DAY_ALRM=13, MON_ALRM=0, CENTURY=50 IAPC_BOOT_ARCH={LEGACY_DEVICES} Flags={WBINVD,C1_SUPPORTED,SLEEP_BUTTON,S4_RTC_WAKE,RESET_REGISTER,PCI_EXPRESS_WAKE,PLATFORM_CLOCK} RESET_REG=0xcf9:0[8] (IO), RESET_VALUE=0x6 X_FACS=0x8ad3e000, X_DSDT=0x8ad81000 X_PM1a_EVT_BLK=0x400:0[32] (IO) X_PM1a_CNT_BLK=0x404:0[16] (IO) X_PM2_CNT_BLK=0x450:0[8] (IO) X_PM_TMR_BLK=0x408:0[32] (IO) X_GPE0_BLK=0x420:0[128] (IO) */ /* FACS: Length=64, HwSig=0x00000000, Firm_Wake_Vec=0x00000000 Global_Lock= Flags= Version=1 */ /* DSDT: Length=20560, Revision=1, Checksum=155, OEMID=APPLE, OEM Table ID=MacBookA, OEM Revision=0x40001, Creator ID=INTL, Creator Revision=0x20100915 */ /* HPET: Length=56, Revision=1, Checksum=140, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x1, Creator ID=Loki, Creator Revision=0x5f HPET Number=0 ADDR=0xfed00000:0[64] (Memory) HW Rev=0x1 Comparators=2 Counter Size=1 Legacy IRQ routing capable={TRUE} PCI Vendor ID=0x8086 Minimal Tick=128 Flags=0x00 */ /* APIC: Length=188, Revision=2, Checksum=95, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x1, Creator ID=Loki, Creator Revision=0x5f Local APIC ADDR=0xfee00000 Flags={PC-AT} Type=Local APIC ACPI CPU=1 Flags={ENABLED} APIC ID=0 Type=Local APIC ACPI CPU=2 Flags={ENABLED} APIC ID=2 Type=Local APIC ACPI CPU=3 Flags={ENABLED} APIC ID=1 Type=Local APIC ACPI CPU=4 Flags={ENABLED} APIC ID=3 Type=Local APIC ACPI CPU=5 Flags={DISABLED} APIC ID=255 Type=Local APIC ACPI CPU=6 Flags={DISABLED} APIC ID=255 Type=Local APIC ACPI CPU=7 Flags={DISABLED} APIC ID=255 Type=Local APIC ACPI CPU=8 Flags={DISABLED} APIC ID=255 Type=IO APIC APIC ID=2 INT BASE=0 ADDR=0x00000000fec00000 Type=INT Override BUS=0 IRQ=0 INTR=2 Flags={Polarity=conforming, Trigger=conforming} Type=INT Override BUS=0 IRQ=9 INTR=9 Flags={Polarity=active-hi, Trigger=level} Type=Local APIC NMI ACPI CPU=1 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=2 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=3 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=4 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=5 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=6 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=7 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local APIC NMI ACPI CPU=8 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} */ /* SBST: Length=48, Revision=1, Checksum=132, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x1, Creator ID=Loki, Creator Revision=0x5f */ /* ECDT: Length=83, Revision=1, Checksum=57, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x1, Creator ID=Loki, Creator Revision=0x5f EC_CONTROL=0x66:0[8] (IO) EC_DATA=0x62:0[8] (IO) UID=0, GPE_BIT=0x17 EC_ID=\_SB.PCI0.LPCB.EC */ /* SSDT: Length=263, Revision=1, Checksum=109, OEMID=APPLE, OEM Table ID=SataAhci, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=36, Revision=1, Checksum=187, OEMID=APPLE, OEM Table ID=SmcDppt, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=1738, Revision=1, Checksum=228, OEMID=APPLE, OEM Table ID=UsbSD, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=345, Revision=2, Checksum=83, OEMID=APPLE, OEM Table ID=IGHda, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=50, Revision=1, Checksum=179, OEMID=APPLE, OEM Table ID=SsdtS3, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=5611, Revision=2, Checksum=174, OEMID=APPLE, OEM Table ID=SsdtIGPU, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=1286, Revision=1, Checksum=233, OEMID=PmRef, OEM Table ID=Cpu0Ist, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=2481, Revision=1, Checksum=62, OEMID=PmRef, OEM Table ID=CpuPm, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=789, Revision=1, Checksum=203, OEMID=PmRef, OEM Table ID=Cpu0Tst, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20100915 */ /* SSDT: Length=890, Revision=1, Checksum=172, OEMID=PmRef, OEM Table ID=ApTst, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20100915 */ /* MCFG: Length=60, Revision=1, Checksum=92, OEMID=APPLE, OEM Table ID=Apple00, OEM Revision=0x1, Creator ID=Loki, Creator Revision=0x5f Base Address=0x00000000e0000000 Segment Group=0x0000 Start Bus=0 End Bus=151 */ /* * Intel ACPI Component Architecture * AML Disassembler version 20130823-64 * Copyright (c) 2000 - 2013 Intel Corporation * * Disassembly of /tmp/acpidump.DCJTap, Mon Sep 29 21:17:52 2014 * * Original Table Header: * Signature "DSDT" * Length 0x00008399 (33689) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support * Checksum 0xF7 * OEM ID "APPLE " * OEM Table ID "MacBookA" * OEM Revision 0x00040001 (262145) * Compiler ID "INTL" * Compiler Version 0x20100915 (537921813) */ DefinitionBlock ("/tmp/acpidump.aml", "DSDT", 1, "APPLE ", "MacBookA", 0x00040001) { /* * iASL Warning: There were 2 external control methods found during * disassembly, but additional ACPI tables to resolve these externals * were not specified. This resulting disassembler output file may not * compile because the disassembler did not know how many arguments * to assign to these methods. To specify the tables needed to resolve * external control method references, use the one of the following * example iASL invocations: * iasl -e -d * iasl -e -d */ External (HDOS, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above) External (HNOT, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above) External (IDAB) External (SNXD) Name (SP2O, 0x4E) Name (SP1O, 0x164E) Name (IO1B, 0x0600) Name (IO1L, 0x70) Name (IO2B, 0x0680) Name (IO2L, 0x20) Name (IO3B, 0x0290) Name (IO3L, 0x10) Name (SP3O, 0x2E) Name (IO4B, 0x0A20) Name (IO4L, 0x20) Name (MCHB, 0xFED10000) Name (MCHL, 0x4000) Name (EGPB, 0xFED19000) Name (EGPL, 0x1000) Name (DMIB, 0xFED18000) Name (DMIL, 0x1000) Name (IFPB, 0xFED14000) Name (IFPL, 0x1000) Name (PEBS, 0xE0000000) Name (PELN, 0x04000000) Name (TTTB, 0xFED20000) Name (TTTL, 0x00020000) Name (SMBS, 0xEFA0) Name (SMBL, 0x10) Name (PBLK, 0x0410) Name (PMBS, 0x0400) Name (PMLN, 0x80) Name (LVL2, 0x0414) Name (LVL3, 0x0415) Name (LVL4, 0x0416) Name (SMIP, 0xB2) Name (GPBS, 0x0500) Name (GPLN, 0x80) Name (APCB, 0xFEC00000) Name (APCL, 0x1000) Name (PM30, 0x0430) Name (SRCB, 0xFED1C000) Name (SRCL, 0x4000) Name (SUSW, 0xFF) Name (HPTB, 0xFED00000) Name (HPTC, 0xFED1F404) Name (ACPH, 0xDE) Name (ASSB, 0x00) Name (AOTB, 0x00) Name (AAXB, 0x00) Name (PEHP, 0x01) Name (SHPC, 0x01) Name (PEPM, 0x01) Name (PEER, 0x01) Name (PECS, 0x01) Name (ITKE, 0x00) Name (DSSP, 0x00) Name (FHPP, 0x01) Name (FMBL, 0x01) Name (FDTP, 0x02) Name (BSH, 0x00) Name (BEL, 0x01) Name (BEH, 0x02) Name (BRH, 0x03) Name (BTF, 0x04) Name (BHC, 0x05) Name (BYB, 0x06) Name (BPH, 0x07) Name (BSHS, 0x08) Name (BELS, 0x09) Name (BRHS, 0x0A) Name (BTFS, 0x0B) Name (BEHS, 0x0C) Name (BPHS, 0x0D) Name (BTL, 0x10) Name (BOF, 0x20) Name (BEF, 0x21) Name (BLLE, 0x22) Name (BLLC, 0x23) Name (BLCA, 0x24) Name (TCGM, 0x01) Name (TRTP, 0x01) Name (TRTD, 0x02) Name (TRTI, 0x03) Name (GCDD, 0x01) Name (DSTA, 0x0A) Name (DSLO, 0x0C) Name (DSLC, 0x0E) Name (PITS, 0x10) Name (SBCS, 0x12) Name (SALS, 0x13) Name (LSSS, 0x2A) Name (SOOT, 0x35) Name (PDBR, 0x4D) Name (WOWE, 0x00) Name (TAPD, 0x00) OperationRegion (GNVS, SystemMemory, 0x8AD50C10, 0x0178) Field (GNVS, AnyAcc, Lock, Preserve) { OSYS, 16, SMIF, 8, PRM0, 8, PRM1, 8, SCIF, 8, PRM2, 8, PRM3, 8, LCKF, 8, PRM4, 8, PRM5, 8, P80D, 32, LIDS, 8, PWRS, 8, DBGS, 8, THOF, 8, ACT1, 8, ACTT, 8, PSVT, 8, TC1V, 8, TC2V, 8, TSPV, 8, CRTT, 8, DTSE, 8, DTS1, 8, DTS2, 8, DTSF, 8, Offset (0x25), REVN, 8, Offset (0x28), APIC, 8, TCNT, 8, PCP0, 8, PCP1, 8, PPCM, 8, PPMF, 32, C67L, 8, NATP, 8, CMAP, 8, CMBP, 8, LPTP, 8, FDCP, 8, CMCP, 8, CIRP, 8, SMSC, 8, W381, 8, SMC1, 8, IGDS, 8, TLST, 8, CADL, 8, PADL, 8, CSTE, 16, NSTE, 16, SSTE, 16, NDID, 8, DID1, 32, DID2, 32, DID3, 32, DID4, 32, DID5, 32, KSV0, 32, KSV1, 8, Offset (0x67), BLCS, 8, BRTL, 8, ALSE, 8, ALAF, 8, LLOW, 8, LHIH, 8, Offset (0x6E), EMAE, 8, EMAP, 16, EMAL, 16, Offset (0x74), MEFE, 8, DSTS, 8, Offset (0x78), TPMP, 8, TPME, 8, MORD, 8, TCGP, 8, PPRP, 32, PPRQ, 8, LPPR, 8, GTF0, 56, GTF2, 56, IDEM, 8, GTF1, 56, BID, 8, Offset (0xAA), ASLB, 32, IBTT, 8, IPAT, 8, ITVF, 8, ITVM, 8, IPSC, 8, IBLC, 8, IBIA, 8, ISSC, 8, I409, 8, I509, 8, I609, 8, I709, 8, IPCF, 8, IDMS, 8, IF1E, 8, HVCO, 8, NXD1, 32, NXD2, 32, NXD3, 32, NXD4, 32, NXD5, 32, NXD6, 32, NXD7, 32, NXD8, 32, GSMI, 8, PAVP, 8, Offset (0xE1), OSCC, 8, NEXP, 8, SDGV, 8, SDDV, 8, Offset (0xEB), DSEN, 8, ECON, 8, GPIC, 8, CTYP, 8, L01C, 8, VFN0, 8, VFN1, 8, Offset (0x100), NVGA, 32, NVHA, 32, AMDA, 32, DID6, 32, DID7, 32, DID8, 32, EBAS, 32, CPSP, 32, EECP, 32, EVCP, 32, XBAS, 32, OBS1, 32, OBS2, 32, OBS3, 32, OBS4, 32, OBS5, 32, OBS6, 32, OBS7, 32, OBS8, 32, Offset (0x157), ATMC, 8, PTMC, 8, ATRA, 8, PTRA, 8, PNHM, 32, TBAB, 32, TBAH, 32, RTIP, 8, TSOD, 8, ATPC, 8, PTPC, 8, PFLV, 8, BREV, 8, DPBM, 8, DPCM, 8, DPDM, 8, ALFP, 8, IMON, 8, SDID, 8, BLCP, 8, BLCB, 32 } Scope (\_SB) { Name (PR00, Package (0x1C) { Package (0x04) { 0x001FFFFF, 0x00, LNKF, 0x00 }, Package (0x04) { 0x001FFFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0x001FFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001FFFFF, 0x03, LNKA, 0x00 }, Package (0x04) { 0x001DFFFF, 0x00, LNKG, 0x00 }, Package (0x04) { 0x001DFFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0x001DFFFF, 0x02, LNKA, 0x00 }, Package (0x04) { 0x001DFFFF, 0x03, LNKC, 0x00 }, Package (0x04) { 0x001AFFFF, 0x00, LNKH, 0x00 }, Package (0x04) { 0x001AFFFF, 0x01, LNKF, 0x00 }, Package (0x04) { 0x001AFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001AFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x001BFFFF, 0x00, LNKG, 0x00 }, Package (0x04) { 0x0018FFFF, 0x00, LNKE, 0x00 }, Package (0x04) { 0x0019FFFF, 0x00, LNKE, 0x00 }, Package (0x04) { 0x0016FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0016FFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0x0016FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0016FFFF, 0x03, LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001CFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001CFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, LNKA, 0x00 } }) Name (AR00, Package (0x1C) { Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x15 }, Package (0x04) { 0x001FFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001FFFFF, 0x03, 0x00, 0x10 }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x16 }, Package (0x04) { 0x001DFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0x001DFFFF, 0x02, 0x00, 0x10 }, Package (0x04) { 0x001DFFFF, 0x03, 0x00, 0x12 }, Package (0x04) { 0x001AFFFF, 0x00, 0x00, 0x17 }, Package (0x04) { 0x001AFFFF, 0x01, 0x00, 0x15 }, Package (0x04) { 0x001AFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001AFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001BFFFF, 0x00, 0x00, 0x16 }, Package (0x04) { 0x0018FFFF, 0x00, 0x00, 0x14 }, Package (0x04) { 0x0019FFFF, 0x00, 0x00, 0x14 }, Package (0x04) { 0x0016FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0016FFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0x0016FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0016FFFF, 0x03, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x10 } }) Name (PR04, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AR04, Package 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(0x04) { 0xFFFF, 0x03, 0x00, 0x11 } }) Name (PR07, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKC, 0x00 } }) Name (AR07, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) Name (PR08, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AR08, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) Name (PR09, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKA, 0x00 } }) Name (AR09, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x10 } }) Name (PR0E, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKB, 0x00 } }) Name (AR0E, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x11 } }) Name (PR0F, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKC, 0x00 } }) Name (AR0F, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) Name (PR02, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AR02, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) Name (PR0A, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKA, 0x00 } }) Name (AR0A, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x10 } }) Name (PR0B, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKB, 0x00 } }) Name (AR0B, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x11 } }) Name (PR0C, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKC, 0x00 } }) Name (AR0C, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) Name (PR01, Package (0x0C) { Package (0x04) { 0xFFFF, 0x00, LNKF, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKG, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKH, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKE, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKG, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKF, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKE, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKH, 0x00 }, Package (0x04) { 0x0005FFFF, 0x00, LNKC, 0x00 }, Package (0x04) { 0x0005FFFF, 0x01, LNKE, 0x00 }, Package (0x04) { 0x0005FFFF, 0x02, LNKG, 0x00 }, Package (0x04) { 0x0005FFFF, 0x03, LNKF, 0x00 } }) Name (AR01, Package (0x0C) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x15 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x16 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x17 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x14 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x16 }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x15 }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x14 }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x17 }, Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x14 }, Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x16 }, Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x15 } }) Name (PRSA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,11,12,14,15} }) Alias (PRSA, PRSB) Alias (PRSA, PRSC) Alias (PRSA, PRSD) Alias (PRSA, PRSE) Alias (PRSA, PRSF) Alias (PRSA, PRSG) Alias (PRSA, PRSH) Device (PCI0) { Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID Name (_ADR, 0x00) // _ADR: Address Method (^BN00, 0, NotSerialized) { Return (0x00) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BN00 ()) } Name (_UID, 0x00) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR00 ()) } Return (PR00 ()) } OperationRegion (HBUS, PCI_Config, 0x00, 0x0100) Field (HBUS, DWordAcc, NoLock, Preserve) { Offset (0x40), EPEN, 1, , 11, EPBR, 20, Offset (0x48), MHEN, 1, , 14, MHBR, 17, Offset (0x50), GCLK, 1, Offset (0x54), D0EN, 1, Offset (0x60), PXEN, 1, PXSZ, 2, , 23, PXBR, 6, Offset (0x68), DIEN, 1, , 11, DIBR, 20, Offset (0x70), , 20, MEBR, 12, Offset (0x80), , 4, PM0H, 2, Offset (0x81), PM1L, 2, , 2, PM1H, 2, Offset (0x82), PM2L, 2, , 2, PM2H, 2, Offset (0x83), PM3L, 2, , 2, PM3H, 2, Offset (0x84), PM4L, 2, , 2, PM4H, 2, Offset (0x85), PM5L, 2, , 2, PM5H, 2, Offset (0x86), PM6L, 2, , 2, PM6H, 2, Offset (0x87), Offset (0xA8), , 20, TUUD, 19, Offset (0xBC), , 20, TLUD, 12, Offset (0xC8), , 7, HTSE, 1 } OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x6000) Field (MCHT, ByteAcc, NoLock, Preserve) { Offset (0x5994), RPSL, 8, Offset (0x5998), RP0C, 8, RP1C, 8, RPNC, 8 } Name (BUF0, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y00, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y01, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y02, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y03, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y04, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y05, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y06, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y07, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y08, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y09, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0A, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0B, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, _Y0C, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xFEAFFFFF, // Range Maximum 0x00000000, // Translation Offset 0xFEB00000, // Length ,, _Y0D, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFED40000, // Range Minimum 0xFED44FFF, // Range Maximum 0x00000000, // Translation Offset 0x00005000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (PM1L) { CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN) // _LEN: Length Store (Zero, C0LN) } If (LEqual (PM1L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW) // _RW_: Read-Write Status Store (Zero, C0RW) } If (PM1H) { CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN) // _LEN: Length Store (Zero, C4LN) } If (LEqual (PM1H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW) // _RW_: Read-Write Status Store (Zero, C4RW) } If (PM2L) { CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN) // _LEN: Length Store (Zero, C8LN) } If (LEqual (PM2L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW) // _RW_: Read-Write Status Store (Zero, C8RW) } If (PM2H) { CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN) // _LEN: Length Store (Zero, CCLN) } If (LEqual (PM2H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW) // _RW_: Read-Write Status Store (Zero, CCRW) } If (PM3L) { CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN) // _LEN: Length Store (Zero, D0LN) } If (LEqual (PM3L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW) // _RW_: Read-Write Status Store (Zero, D0RW) } If (PM3H) { CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN) // _LEN: Length Store (Zero, D4LN) } If (LEqual (PM3H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW) // _RW_: Read-Write Status Store (Zero, D4RW) } If (PM4L) { CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN) // _LEN: Length Store (Zero, D8LN) } If (LEqual (PM4L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW) // _RW_: Read-Write Status Store (Zero, D8RW) } If (PM4H) { CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN) // _LEN: Length Store (Zero, DCLN) } If (LEqual (PM4H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW) // _RW_: Read-Write Status Store (Zero, DCRW) } If (PM5L) { CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN) // _LEN: Length Store (Zero, E0LN) } If (LEqual (PM5L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW) // _RW_: Read-Write Status Store (Zero, E0RW) } If (PM5H) { CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN) // _LEN: Length Store (Zero, E4LN) } If (LEqual (PM5H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW) // _RW_: Read-Write Status Store (Zero, E4RW) } If (PM6L) { CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN) // _LEN: Length Store (Zero, E8LN) } If (LEqual (PM6L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW) // _RW_: Read-Write Status Store (Zero, E8RW) } If (PM6H) { CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN) // _LEN: Length Store (Zero, ECLN) } If (LEqual (PM6H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW) // _RW_: Read-Write Status Store (Zero, ECRW) } If (PM0H) { CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN) // _LEN: Length Store (Zero, F0LN) } If (LEqual (PM0H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW) // _RW_: Read-Write Status Store (Zero, F0RW) } CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN) // _MIN: Minimum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX) // _MAX: Maximum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, M1LN) // _LEN: Length ShiftLeft (TLUD, 0x14, M1MN) Add (Subtract (M1MX, M1MN), 0x01, M1LN) Return (BUF0) } Name (GUID, Buffer (0x10) { /* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40, /* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66 }) Name (SUPP, 0x00) Name (CTRL, 0x00) Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Store (Arg3, Local0) CreateDWordField (Local0, 0x00, CDW1) CreateDWordField (Local0, 0x04, CDW2) CreateDWordField (Local0, 0x08, CDW3) Store (CDW2, SUPP) Store (CDW3, CTRL) If (LEqual (0x01, OSDW ())) { If (LAnd (LEqual (Arg0, GUID), NEXP)) { If (Not (And (CDW1, 0x01))) { If (And (CTRL, 0x02)) { NHPG () } If (And (CTRL, 0x04)) { NPME () } } If (LNotEqual (Arg1, One)) { Or (CDW1, 0x08, CDW1) } If (LNotEqual (CDW3, CTRL)) { Or (CDW1, 0x10, CDW1) } Store (CTRL, CDW3) Store (CTRL, OSCC) Return (Local0) } Else { Or (CDW1, 0x04, CDW1) Return (Local0) } } Else { If (LEqual (\_SB.PCI0.P0P2.LDIS, 0x00)) { And (CDW3, 0xFFFFFFFB, CDW3) } Return (Local0) } } Scope (\_SB.PCI0) { Method (AR00, 0, NotSerialized) { Return (\_SB.AR00) } Method (PR00, 0, NotSerialized) { Return (\_SB.PR00) } Method (AR01, 0, NotSerialized) { Return (\_SB.AR01) } Method (PR01, 0, NotSerialized) { Return (\_SB.PR01) } Method (AR02, 0, NotSerialized) { Return (\_SB.AR02) } Method (PR02, 0, NotSerialized) { Return (\_SB.PR02) } Method (AR04, 0, NotSerialized) { Return (\_SB.AR04) } Method (PR04, 0, NotSerialized) { Return (\_SB.PR04) } Method (AR05, 0, NotSerialized) { Return (\_SB.AR05) } Method (PR05, 0, NotSerialized) { Return (\_SB.PR05) } Method (AR06, 0, NotSerialized) { Return (\_SB.AR06) } Method (PR06, 0, NotSerialized) { Return (\_SB.PR06) } Method (AR07, 0, NotSerialized) { Return (\_SB.AR07) } Method (PR07, 0, NotSerialized) { Return (\_SB.PR07) } Method (AR08, 0, NotSerialized) { Return (\_SB.AR08) } Method (PR08, 0, NotSerialized) { Return (\_SB.PR08) } Method (AR09, 0, NotSerialized) { Return (\_SB.AR09) } Method (PR09, 0, NotSerialized) { Return (\_SB.PR09) } Method (AR0A, 0, NotSerialized) { Return (\_SB.AR0A) } Method (PR0A, 0, NotSerialized) { Return (\_SB.PR0A) } Method (AR0B, 0, NotSerialized) { Return (\_SB.AR0B) } Method (PR0B, 0, NotSerialized) { Return (\_SB.PR0B) } } Device (MCHC) { Name (_ADR, 0x00) // _ADR: Address } Device (P0P2) { Name (_ADR, 0x00010000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR02 ()) } Return (PR02 ()) } } Device (IGPU) { Name (_ADR, 0x00020000) // _ADR: Address } Device (SATA) { Name (_ADR, 0x001F0002) // _ADR: Address } Device (SBUS) { Name (_ADR, 0x001F0003) // _ADR: Address OperationRegion (SMBP, PCI_Config, 0x40, 0xC0) Field (SMBP, DWordAcc, NoLock, Preserve) { , 2, I2CE, 1 } OperationRegion (SMPB, PCI_Config, 0x20, 0x04) Field (SMPB, DWordAcc, NoLock, Preserve) { , 5, SBAR, 11 } OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10) Field (SMBI, ByteAcc, NoLock, Preserve) { HSTS, 8, Offset (0x02), HCON, 8, HCOM, 8, TXSA, 8, DAT0, 8, DAT1, 8, HBDR, 8, PECR, 8, RXSA, 8, SDAT, 16 } Method (SSXB, 2, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRXB, 1, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (0x44, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (DAT0) } Return (0xFFFF) } Method (SWRB, 3, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (Arg2, DAT0) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRDB, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (DAT0) } Return (0xFFFF) } Method (SWRW, 3, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) And (Arg2, 0xFF, DAT1) And (ShiftRight (Arg2, 0x08), 0xFF, DAT0) Store (0x4C, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRDW, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x4C, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (Or (ShiftLeft (DAT0, 0x08), DAT1)) } Return (0xFFFFFFFF) } Method (SBLW, 4, Serialized) { If (STRT ()) { Return (0x00) } Store (Arg3, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (SizeOf (Arg2), DAT0) Store (0x00, Local1) Store (DerefOf (Index (Arg2, 0x00)), HBDR) Store (0x54, HCON) While (LGreater (SizeOf (Arg2), Local1)) { Store (0x4E20, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) } If (LNot (Local0)) { KILL () Return (0x00) } Increment (Local1) If (LGreater (SizeOf (Arg2), Local1)) { Store (DerefOf (Index (Arg2, Local1)), HBDR) Store (0x80, HSTS) } } Store (0x80, HSTS) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SBLR, 3, Serialized) { Name (TBUF, Buffer (0x0100) {}) If (STRT ()) { Return (0x00) } Store (Arg2, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x54, HCON) Store (0x0FA0, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) Stall (0x32) } If (LNot (Local0)) { KILL () Return (0x00) } Store (DAT0, Index (TBUF, 0x00)) Store (0x80, HSTS) Store (0x01, Local1) While (LLess (Local1, DerefOf (Index (TBUF, 0x00)))) { Store (0x0FA0, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) Stall (0x32) } If (LNot (Local0)) { KILL () Return (0x00) } Store (HBDR, Index (TBUF, Local1)) Store (0x80, HSTS) Increment (Local1) } If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (TBUF) } Return (0x00) } Method (STRT, 0, Serialized) { Store (0xC8, Local0) While (Local0) { If (And (HSTS, 0x40)) { Decrement (Local0) Sleep (0x01) If (LEqual (Local0, 0x00)) { Return (0x01) } } Else { Store (0x00, Local0) } } Store (0x0FA0, Local0) While (Local0) { If (And (HSTS, 0x01)) { Decrement (Local0) Stall (0x32) If (LEqual (Local0, 0x00)) { KILL () } } Else { Return (0x00) } } Return (0x01) } Method (COMP, 0, Serialized) { Store (0x0FA0, Local0) While (Local0) { If (And (HSTS, 0x02)) { Return (0x01) } Else { Decrement (Local0) Stall (0x32) If (LEqual (Local0, 0x00)) { KILL () } } } Return (0x00) } Method (KILL, 0, Serialized) { Or (HCON, 0x02, HCON) Or (HSTS, 0xFF, HSTS) } Device (BUS0) { Name (_CID, "smbus") // _CID: Compatible ID Name (_ADR, 0x00) // _ADR: Address Device (MKY0) { Name (_ADR, 0x00) // _ADR: Address Name (_CID, "mikey") // _CID: Compatible ID Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0A) { "refnum", 0x00, "address", 0x39, "device-id", 0x0CD2, "ramp-control-address", 0x3B, "hdet", 0x01 }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } Method (H1EN, 1, Serialized) { If (LLessEqual (Arg0, 0x01)) { If (LEqual (Arg0, 0x01)) { Or (GP16, 0x01, GP16) } Else { And (GP16, 0x00, GP16) } } } Method (H1IL, 0, Serialized) { Store (GP05, Local0) Return (Local0) } Method (H1IP, 1, Serialized) { Store (Arg0, Local0) If (LLessEqual (Arg0, 0x01)) { Not (Arg0, Arg0) Store (Arg0, GI05) } } Name (H1IN, 0x15) Scope (\_GPE) { Method (_L15, 0, NotSerialized) // _Lxx: Level-Triggered GPE { If (OSDW ()) { Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80) } Else { Store (0x00, GI05) Store (0x00, GU05) Notify (\_SB.PWRB, 0x02) } } } Method (P1IL, 0, Serialized) { Store (GP03, Local0) Return (Local0) } Method (P1IP, 1, Serialized) { If (LLessEqual (Arg0, 0x01)) { Not (Arg0, Arg0) Store (Arg0, GI03) } } Name (P1IN, 0x13) Scope (\_GPE) { Method (_L13, 0, NotSerialized) // _Lxx: Level-Triggered GPE { XOr (GI03, 0x01, GI03) If (OSDW ()) { Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x81) } Else { Notify (\_SB.PWRB, 0x02) } } } } } Device (BUS1) { Name (_CID, "smbus") // _CID: Compatible ID Name (_ADR, 0x01) // _ADR: Address } } Device (LPCB) { Name (_ADR, 0x001F0000) // _ADR: Address Scope (\_SB) { OperationRegion (\_SB.PCI0.LPCB.LPC1, PCI_Config, 0x40, 0xC0) Field (\_SB.PCI0.LPCB.LPC1, AnyAcc, NoLock, Preserve) { Offset (0x20), PARC, 8, PBRC, 8, PCRC, 8, PDRC, 8, Offset (0x28), PERC, 8, PFRC, 8, PGRC, 8, PHRC, 8 } Device (LNKA) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x01) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PARC, 0x80, PARC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y0E) {} }) CreateWordField (RTLA, \_SB.LNKA._CRS._Y0E._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PARC, 0x0F), IRQ0) Return (RTLA) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PARC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PARC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKB) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PBRC, 0x80, PBRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLB, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y0F) {} }) CreateWordField (RTLB, \_SB.LNKB._CRS._Y0F._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PBRC, 0x0F), IRQ0) Return (RTLB) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PBRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PBRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKC) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PCRC, 0x80, PCRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y10) {} }) CreateWordField (RTLC, \_SB.LNKC._CRS._Y10._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PCRC, 0x0F), IRQ0) Return (RTLC) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PCRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PCRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKD) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PDRC, 0x80, PDRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLD, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y11) {} }) CreateWordField (RTLD, \_SB.LNKD._CRS._Y11._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PDRC, 0x0F), IRQ0) Return (RTLD) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PDRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PDRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKE) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PERC, 0x80, PERC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLE, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y12) {} }) CreateWordField (RTLE, \_SB.LNKE._CRS._Y12._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PERC, 0x0F), IRQ0) Return (RTLE) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PERC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PERC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKF) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PFRC, 0x80, PFRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLF, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y13) {} }) CreateWordField (RTLF, \_SB.LNKF._CRS._Y13._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PFRC, 0x0F), IRQ0) Return (RTLF) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PFRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PFRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKG) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PGRC, 0x80, PGRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLG, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y14) {} }) CreateWordField (RTLG, \_SB.LNKG._CRS._Y14._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PGRC, 0x0F), IRQ0) Return (RTLG) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PGRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PGRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKH) { Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Or (PHRC, 0x80, PHRC) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLH, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y15) {} }) CreateWordField (RTLH, \_SB.LNKH._CRS._Y15._INT, IRQ0) // _INT: Interrupts Store (Zero, IRQ0) ShiftLeft (0x01, And (PHRC, 0x0F), IRQ0) Return (RTLH) } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PHRC) } Method (_STA, 0, Serialized) // _STA: Status { If (And (PHRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } } OperationRegion (LPC0, PCI_Config, 0x40, 0xC0) Field (LPC0, AnyAcc, NoLock, Preserve) { Offset (0x40), IOD0, 8, IOD1, 8, Offset (0xB0), RAEN, 1, , 13, RCBA, 18 } Device (DMAC) { Name (_HID, EisaId ("PNP0200")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) } Device (FWHD) { Name (_HID, EisaId ("INT0800")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID Name (_CID, EisaId ("PNP0C01")) // _CID: Compatible ID Name (BUF0, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00000400, // Address Length _Y16) }) Method (_STA, 0, NotSerialized) // _STA: Status { If (LGreaterEqual (OSYS, 0x07D1)) { If (HPAE) { Return (0x0F) } } Else { If (HPAE) { Return (0x0B) } } Return (0x00) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y16._BAS, HPT0) // _BAS: Base Address If (LEqual (HPAS, 0x01)) { Store (0xFED01000, HPT0) } If (LEqual (HPAS, 0x02)) { Store (0xFED02000, HPT0) } If (LEqual (HPAS, 0x03)) { Store (0xFED03000, HPT0) } } Return (BUF0) } } Device (IPIC) { Name (_HID, EisaId ("PNP0000")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (MATH) { Name (_HID, EisaId ("PNP0C04")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) } Device (LDRC) { Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x1000, // Range Minimum 0x1000, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x0400, // Range Minimum 0x0400, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x0500, // Range Minimum 0x0500, // Range Maximum 0x01, // Alignment 0x80, // Length ) }) } Device (RTC) { Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) }) } Device (TIMR) { Name (_HID, EisaId ("PNP0100")) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) }) } Device (SMC) { Name (_HID, EisaId ("APP0001")) // _HID: Hardware ID Name (_CID, "smc-huronriver") // _CID: Compatible ID Name (_STA, 0x0B) // _STA: Status Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0300, // Range Minimum 0x0300, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {6} }) } Device (ALS0) { Name (_HID, "ACPI0008") // _HID: Hardware ID Name (_CID, "smc-als") // _CID: Compatible ID Name (BUFF, Buffer (0x02) {}) CreateByteField (BUFF, 0x00, OB0) CreateByteField (BUFF, 0x01, OB1) CreateWordField (BUFF, 0x00, ALSI) Method (_STA, 0, NotSerialized) // _STA: Status { If (LGreaterEqual (OSYS, 0x07D9)) { Return (0x0F) } Else { Return (0x00) } } Method (_ALI, 0, NotSerialized) // _ALI: Ambient Light Illuminance { Store (\_SB.PCI0.LPCB.EC.ALB0, OB0) Store (\_SB.PCI0.LPCB.EC.ALB1, OB1) Store (ALSI, Local0) Return (Local0) } Name (_ALR, Package (0x05) // _ALR: Ambient Light Response { Package (0x02) { 0x0A, 0x00 }, Package (0x02) { 0x14, 0x0A }, Package (0x02) { 0x32, 0x50 }, Package (0x02) { 0x5A, 0x012C }, Package (0x02) { 0x64, 0x03E8 } }) } Device (EC) { Name (_HID, EisaId ("PNP0C09")) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) Name (_GPE, 0x17) // _GPE: General Purpose Events Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x23, 0x04 }) Name (ECOK, 0x00) OperationRegion (ECOR, EmbeddedControl, 0x00, 0xFF) Field (ECOR, ByteAcc, Lock, Preserve) { ECVS, 8, Offset (0x02), Offset (0x03), G3HT, 1, Offset (0x04), WBCB, 1, DSLP, 1, Offset (0x05), Offset (0x06), WKRS, 8, Offset (0x10), ECSS, 8, PLIM, 8, ALB0, 8, ALB1, 8, WTLB, 8, WTMB, 8, Offset (0x20), SPTR, 8, SSTS, 8, SADR, 8, SCMD, 8, SBFR, 256, SCNT, 8, SAAD, 8, SAD0, 8, SAD1, 8, SMUX, 8, Offset (0x60), ELSW, 1, EACP, 1, ECDI, 1, ENMI, 1, Offset (0x61), EMHP, 1, Offset (0x62), Offset (0x63), Offset (0x64), SWLO, 1, SWLC, 1, SWAI, 1, SWAR, 1, SWCI, 1, SWCE, 1, SWMI, 1, SWMR, 1, SWPB, 1, SWGP, 1, SWPM, 1, SWWT, 1, SWLB, 1, Offset (0x66), Offset (0x67), Offset (0x68), EWLO, 1, EWLC, 1, EWAI, 1, EWAR, 1, EWCI, 1, EWCE, 1, EWMI, 1, EWMR, 1, EWPB, 1, EWGP, 1, EWPM, 1, ENWT, 1, EWLB, 1, Offset (0x6A), Offset (0x6B), Offset (0x6C), LWLO, 1, LWLC, 1, LWAI, 1, LWAR, 1, LWCI, 1, LWCE, 1, LWMI, 1, LWMR, 1, LWPB, 1, LWGP, 1, LWPM, 1, LWWT, 1, LWLB, 1, Offset (0x6E), Offset (0x6F), Offset (0x70) } Field (ECOR, ByteAcc, Lock, Preserve) { Offset (0x03), G3AD, 1, BLOD, 1, S4WE, 1, Offset (0x04), Offset (0x6C), LWE0, 8, LWE1, 8, LWE2, 8, LWE3, 8 } Field (ECOR, ByteAcc, Lock, Preserve) { Offset (0x24), SBDW, 16, Offset (0x46), SADW, 16 } Method (WAKE, 0, NotSerialized) { If (ECOK) { Store ("EC Wake reason =", Debug) Store (WKRS, Debug) Store (EWAI, Debug) Store (EWAR, Debug) Return (WKRS) } Else { Return (0x00) } } Device (SMB0) { Name (_HID, "ACPI0001") // _HID: Hardware ID Name (_EC, 0x2010) // _EC_: Embedded Controller Mutex (SMTX, 0x00) Method (_STA, 0, NotSerialized) // _STA: Status { If (OSDW ()) { Return (0x0F) } Else { Return (0x00) } } Device (SBS0) { Name (_HID, "ACPI0002") // _HID: Hardware ID Name (_SBS, 0x01) // _SBS: Smart Battery Subsystem } Method (SBPC, 1, NotSerialized) { Store (Arg0, Local0) While (Local0) { If (LEqual (SPTR, 0x00)) { Return (And (SSTS, 0x1F)) } Sleep (0x01) Decrement (Local0) } Return (0x18) } Method (SBRW, 3, NotSerialized) { Store (One, Local0) If (LNot (Acquire (\_SB.PCI0.LPCB.EC.SMB0.SMTX, 0xFFFF))) { If (LEqual (SPTR, 0x00)) { Store (ShiftLeft (Arg0, 0x01), SADR) Store (Arg1, SCMD) Store (0x09, SPTR) Store (SBPC (0x03E8), Local0) If (LNot (Local0)) { Store (SBDW, Arg2) } } Release (\_SB.PCI0.LPCB.EC.SMB0.SMTX) } Return (Local0) } Method (SBRB, 3, NotSerialized) { Store (One, Local0) Store (Buffer (0x01) { 0x00 }, Local1) If (LNot (Acquire (\_SB.PCI0.LPCB.EC.SMB0.SMTX, 0xFFFF))) { If (LEqual (SPTR, 0x00)) { Store (ShiftLeft (Arg0, 0x01), SADR) Store (Arg1, SCMD) Store (0x0B, SPTR) Store (SBPC (0x03E8), Local0) If (LNot (Local0)) { Store (SBFR, Arg2) } } Release (\_SB.PCI0.LPCB.EC.SMB0.SMTX) } Return (Local0) } } Method (_Q10, 0, NotSerialized) // _Qxx: EC Query { If (OSDW ()) { Notify (\_SB.PCI0.LPCB.EC.SMB0, 0x80) } Else { If (And (SSTS, 0x40)) { If (LNot (Acquire (\_SB.PCI0.LPCB.EC.SMB0.SMTX, 0xFFFF))) { Store (ShiftRight (SAAD, 0x01), Local0) If (LEqual (Local0, 0x0A)) { \_SB.BAT0.BNOT (SADW) } Store (0x00, SSTS) Release (\_SB.PCI0.LPCB.EC.SMB0.SMTX) } } } } Method (_Q20, 0, NotSerialized) // _Qxx: EC Query { Store (ELSW, LIDS) Store (ELSW, \_SB.PCI0.IGPU.CLID) Notify (\_SB.LID0, 0x80) } Method (_Q21, 0, NotSerialized) // _Qxx: EC Query { If (EACP) { Store (0x01, PWRS) } Else { Store (0x00, PWRS) } Notify (\_SB.ADP1, 0x80) PNOT () } Method (_Q40, 0, NotSerialized) // _Qxx: EC Query { Notify (\_SB.PCI0.LPCB.ALS0, 0x80) } Method (_Q5A, 0, NotSerialized) // _Qxx: EC Query { Notify (\_SB.SLPB, 0x80) } Method (_Q80, 0, NotSerialized) // _Qxx: EC Query { Notify (\_PR.CPU0, 0x80) Notify (\_PR.CPU1, 0x80) Notify (\_PR.CPU2, 0x80) Notify (\_PR.CPU3, 0x80) Notify (\_PR.CPU4, 0x80) Notify (\_PR.CPU5, 0x80) Notify (\_PR.CPU6, 0x80) Notify (\_PR.CPU7, 0x80) Store (GPLT, Local0) Subtract (RP0C, Local0, Local0) Store (Local0, RPSL) } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (LOr (LEqual (Arg0, 0x03), LGreaterEqual (OSYS, 0x07D6))) { Store (Arg1, ECOK) If (LEqual (Arg1, 0x01)) { Store (0x00, ECSS) Store (ELSW, LIDS) Store (ELSW, \_SB.PCI0.IGPU.CLID) Notify (\_SB.LID0, 0x80) Store (EACP, PWRS) Notify (\_SB.ADP1, 0x80) } } } } Scope (\_SB) { Device (BAT0) { Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { \_SB }) Name (BSSW, 0xFFFF) Name (PBIF, Package (0x0D) { 0x00, 0xFFFFFFFF, 0xFFFFFFFF, 0x01, 0xFFFFFFFF, 0xFA, 0x64, 0x0A, 0x0A, " ", " ", " ", " " }) Name (PBST, Package (0x04) { 0x00, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Method (_STA, 0, NotSerialized) // _STA: Status { If (OSDW ()) { Return (0x00) } If (\_SB.PCI0.LPCB.EC.ECOK) { UBSS () If (And (BSSW, 0x01)) { Return (0x1F) } Else { Return (0x0F) } } Else { Return (0x0F) } } Method (_BST, 0, NotSerialized) // _BST: Battery Status { If (And (BSSW, 0x01)) { UBST () } Else { Store (0x00, Index (PBST, 0x00)) Store (0xFFFFFFFF, Index (PBST, 0x01)) Store (0xFFFFFFFF, Index (PBST, 0x02)) } Return (PBST) } Method (_BIF, 0, NotSerialized) // _BIF: Battery Information { If (And (BSSW, 0x01)) { UBIF () } Return (PBIF) } Method (BNOT, 1, NotSerialized) { Store (BSSW, Local0) Store (Arg0, BSSW) Notify (\_SB.BAT0, 0x80) If (And (XOr (Local0, Arg0), 0x01)) { Notify (\_SB.BAT0, 0x81) } } Method (UBSS, 0, NotSerialized) { \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0A, 0x01, RefOf (BSSW)) } Method (UBIF, 0, NotSerialized) { \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x18, RefOf (Local0)) Multiply (Local0, 0x0A, Index (PBIF, 0x01)) \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x10, RefOf (Local0)) Multiply (Local0, 0x0A, Index (PBIF, 0x02)) \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x19, RefOf (Local0)) Store (Local0, Index (PBIF, 0x04)) \_SB.PCI0.LPCB.EC.SMB0.SBRB (0x0B, 0x21, RefOf (Local0)) Store (Local0, Index (PBIF, 0x09)) Store (Buffer (0x01) { 0x00 }, Index (PBIF, 0x0A)) \_SB.PCI0.LPCB.EC.SMB0.SBRB (0x0B, 0x22, RefOf (Local0)) Store (Local0, Index (PBIF, 0x0B)) \_SB.PCI0.LPCB.EC.SMB0.SBRB (0x0B, 0x20, RefOf (Local0)) Store (Local0, Index (PBIF, 0x0C)) } Method (UBST, 0, NotSerialized) { \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x09, RefOf (Local2)) Store (Local2, Index (PBST, 0x03)) \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x0A, RefOf (Local0)) If (And (Local0, 0x8000)) { Not (Local0, Local0) And (Increment (Local0), 0xFFFF, Local0) } Multiply (Local0, Local2, Local0) Divide (Local0, 0x03E8, , Index (PBST, 0x01)) \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x0F, RefOf (Local0)) Multiply (Local0, 0x0A, Index (PBST, 0x02)) Store (0x00, Local1) If (PWRS) { \_SB.PCI0.LPCB.EC.SMB0.SBRW (0x0B, 0x16, RefOf (Local0)) If (LNot (And (Local0, 0x40))) { Store (0x02, Local1) } } Else { Store (0x01, Local1) } Store (Local1, Index (PBST, 0x00)) } } } } Device (HDEF) { Name (_ADR, 0x001B0000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) } Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address OperationRegion (A1E0, PCI_Config, 0x00, 0xFF) Field (A1E0, ByteAcc, NoLock, Preserve) { Offset (0x04), BMIE, 3, Offset (0x19), SECB, 8, SBBN, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x4A), , 5, TPEN, 1, Offset (0x50), , 4, LDIS, 1, , 24, LACT, 1, Offset (0xA4), PSTA, 2 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { If (LAnd (LEqual (BMIE, 0x00), LEqual (SECB, 0xFF))) { Return (SNBS) } Else { Return (SECB) } } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (BMIS, 0x00) Name (SNBS, 0x00) Name (SOBS, 0x00) Method (APPD, 0, Serialized) { If (LOr (LNot (OSDW ()), LOr (LEqual (WOWE, 0x01), LNotEqual ( TAPD, 0x01)))) { Return (Zero) } Store (0x03, \_SB.PCI0.RP02.ARPT.PSTA) If (LAnd (LAnd (LNotEqual (BMIE, 0x00), LNotEqual (BMIE, BMIS)), LAnd (LAnd (LNotEqual (SECB, 0x00), LNotEqual (SECB, SNBS)), LAnd (LNotEqual (SBBN, 0x00), LNotEqual (SBBN, SOBS))))) { Store (BMIE, BMIS) Store (SECB, SNBS) Store (SBBN, SOBS) } Store (0x00, BMIE) Store (0xFF, SECB) Store (0xFE, SBBN) Store (TPEN, Local0) Store (0x03, PSTA) Store (TPEN, Local0) Store (0x01, LDIS) Add (Timer, 0x00989680, Local0) While (LLessEqual (Timer, Local0)) { If (LEqual (LACT, 0x00)) { Break } Sleep (0x0A) } Store (0x00, GP59) Store (0x00, GI59) Sleep (0x0107) Return (Zero) } Method (APPU, 0, Serialized) { If (LOr (LNot (OSDW ()), LOr (LEqual (WOWE, 0x01), LNotEqual ( TAPD, 0x01)))) { Return (Zero) } Store (0x00, Local0) Store (0x00, PSTA) Store (SOBS, SBBN) Store (SNBS, SECB) Store (0x00, LDIS) If (LAnd (LEqual (GI59, 0x01), LEqual (GP59, 0x01))) { Return (Zero) } While (0x01) { Store (0x01, GI59) Sleep (0x6A) Store (0x00, Local1) Add (Timer, 0x00989680, Local2) While (LLessEqual (Timer, Local2)) { If (LAnd (LEqual (LACT, 0x01), LNotEqual (\_SB.PCI0.RP02.ARPT.AVND, 0xFFFF))) { Store (0x01, Local1) Break } Sleep (0x0A) } If (LEqual (Local1, 0x01)) { Store (0x01, MABT) Break } If (LEqual (Local0, 0x04)) { Break } Increment (Local0) Store (0x00, GI59) Store (0x00, GP59) Sleep (0x0107) } Return (Zero) } Method (ALPR, 1, NotSerialized) { If (LEqual (Arg0, 0x01)) { APPD () } Else { APPU () } } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { ALPR (0x00) } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { ALPR (0x01) } Device (ARPT) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (ARE2, PCI_Config, 0x00, 0xFF) Field (ARE2, ByteAcc, NoLock, Preserve) { AVND, 16, ADID, 16, Offset (0x44), PSTA, 2 } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } Method (WWEN, 1, NotSerialized) { Store (Arg0, WOWE) } Method (PDEN, 1, NotSerialized) { Store (Arg0, TAPD) } } Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x09, 0x04 }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR05 ()) } Return (PR05 ()) } } Scope (\_SB.PCI0.P0P2) { OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } OperationRegion (A1E1, PCI_Config, 0xA0, 0x40) Field (A1E1, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), Offset (0x08), Offset (0x0A), , 5, TPEN, 1, Offset (0x0C), SSPD, 4, , 16, LACR, 1, Offset (0x10), , 4, LDIS, 1, LRTN, 1, Offset (0x12), CSPD, 4, , 7, LTRN, 1, , 1, LACT, 1, Offset (0x14), Offset (0x30), TSPD, 4 } OperationRegion (A1E2, PCI_Config, 0x80, 0x08) Field (A1E2, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), PSTA, 2 } OperationRegion (A1E3, PCI_Config, 0x0200, 0x20) Field (A1E3, ByteAcc, NoLock, Preserve) { Offset (0x14), Offset (0x16), PSTS, 4 } Device (UPSB) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } OperationRegion (A1E1, PCI_Config, 0xC0, 0x40) Field (A1E1, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), Offset (0x08), Offset (0x0A), , 5, TPEN, 1, Offset (0x0C), SSPD, 4, Offset (0x10), , 4, LDIS, 1, LRTN, 1, , 23, LACT, 1, Offset (0x30), TSPD, 4 } OperationRegion (A1E2, PCI_Config, 0x80, 0x08) Field (A1E2, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), PSTA, 2 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Device (DSB0) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } OperationRegion (A1E1, PCI_Config, 0xC0, 0x40) Field (A1E1, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), Offset (0x08), Offset (0x0A), , 5, TPEN, 1, Offset (0x0C), Offset (0x10), , 4, LDIS, 1, LRTN, 1, , 23, LACT, 1 } OperationRegion (A1E2, PCI_Config, 0x80, 0x08) Field (A1E2, ByteAcc, NoLock, Preserve) { Offset (0x01), Offset (0x02), Offset (0x04), PSTA, 2 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Device (NHI0) { Name (_ADR, 0x00) // _ADR: Address Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device { If (LNot (OSDW ())) { Store (0x01, \_SB.PCI0.P0P2.LDIS) Sleep (0x07D0) Store (0x00, GP23) Notify (\_SB.PCI0.P0P2, 0x00) } } OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (XRPE, 1, Serialized) { If (OSDW ()) { If (LLessEqual (Arg0, 0x01)) { If (LEqual (Arg0, 0x00)) { Store (0x03, \_SB.PCI0.P0P2.PSTA) Store (0x01, \_SB.PCI0.P0P2.LDIS) Add (Timer, 0x00989680, Local0) While (LLessEqual (Timer, Local0)) { If (LEqual (\_SB.PCI0.P0P2.LACR, 0x01)) { If (LEqual (\_SB.PCI0.P0P2.LACT, 0x00)) { Break } } Else { If (LEqual (\_SB.PCI0.P0P2.UPSB.AVND, 0xFFFFFFFF)) { Break } } Sleep (0x0A) } Store (0x00, GP23) } Else { Store (0x00, Local0) If (LEqual (GP23, 0x00)) { Store (0x00, \_SB.PCI0.P0P2.PSTA) While (0x01) { Store (0x01, GP23) Sleep (0x07D0) Store (0x00, Local1) Store (0x00, \_SB.PCI0.P0P2.LDIS) Add (Timer, 0x00989680, Local2) While (LLessEqual (Timer, Local2)) { If (LAnd (LNotEqual (\_SB.PCI0.P0P2.LTRN, 0x01), LNotEqual (\_SB.PCI0.P0P2.UPSB.AVND, 0xFFFFFFFF))) { Store (0x01, Local1) Break } Sleep (0x0A) } If (LEqual (Local1, 0x01)) { Store (0x01, MABT) Break } If (LEqual (Local0, 0x04)) { Return (Zero) } Increment (Local0) Store (0x00, GP23) Sleep (0x03E8) } If (LEqual (\_SB.PCI0.P0P2.CSPD, 0x01)) { If (LEqual (\_SB.PCI0.P0P2.SSPD, 0x02)) { If (LEqual (\_SB.PCI0.P0P2.UPSB.SSPD, 0x02)) { If (LNotEqual (\_SB.PCI0.P0P2.TSPD, 0x02)) { Store (0x02, \_SB.PCI0.P0P2.TSPD) } If (LNotEqual (\_SB.PCI0.P0P2.UPSB.TSPD, 0x02)) { Store (0x02, \_SB.PCI0.P0P2.UPSB.TSPD) } Store (0x01, \_SB.PCI0.P0P2.LRTN) Add (Timer, 0x00989680, Local2) While (LLessEqual (Timer, Local2)) { If (LAnd (LNotEqual (\_SB.PCI0.P0P2.LTRN, 0x01), LNotEqual (\_SB.PCI0.P0P2.UPSB.AVND, 0xFFFFFFFF))) { Store (0x01, Local1) Break } Sleep (0x0A) } } } } } } } } Return (Zero) } Method (XRIP, 1, Serialized) { If (LLessEqual (Arg0, 0x01)) { Store (Arg0, GI04) } } Method (XRIO, 1, Serialized) { If (LLessEqual (Arg0, 0x01)) { Store (Arg0, GD04) } } Method (XRIL, 0, Serialized) { Return (GP04) } Name (XRIN, 0x14) Name (_GPE, 0x14) // _GPE: General Purpose Events Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x03) { "power-save", 0x01, Buffer (0x01) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } } Device (DSB1) { Name (_ADR, 0x00030000) // _ADR: Address Name (_SUN, 0x02) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } Device (DSB2) { Name (_ADR, 0x00040000) // _ADR: Address Name (_SUN, 0x03) // _SUN: Slot User Number Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (OSDW ()) } OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Device (UPS2) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (ARE0, PCI_Config, 0x00, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } } } Device (DSB3) { Name (_ADR, 0x00050000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (OSDW ()) } OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Device (UPS2) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (ARE0, PCI_Config, 0x00, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } } } Device (DSB4) { Name (_ADR, 0x00060000) // _ADR: Address Name (_SUN, 0x05) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, 0x00, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg0, Buffer (0x10) { /* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, /* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B })) { Store (Package (0x02) { "PCI-Thunderbolt", 0x01 }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } Return (0x80000002) } } } } Device (ADP1) { Name (_HID, "ACPI0003") // _HID: Hardware ID Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x23, 0x04 }) Name (WK00, 0x01) Method (SWAK, 1, NotSerialized) { And (Arg0, 0x03, WK00) If (LNot (WK00)) { Store (0x01, WK00) } } Method (_PSR, 0, NotSerialized) // _PSR: Power Source { Return (PWRS) } Method (_PCL, 0, NotSerialized) // _PCL: Power Consumer List { Return (\_SB) } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (OSDW ()) { If (\_SB.PCI0.LPCB.EC.ECOK) { If (Arg0) { If (And (WK00, 0x01)) { Store (0x01, \_SB.PCI0.LPCB.EC.EWAI) } If (And (WK00, 0x02)) { Store (0x01, \_SB.PCI0.LPCB.EC.EWAR) } } Else { Store (0x00, \_SB.PCI0.LPCB.EC.EWAI) Store (0x00, \_SB.PCI0.LPCB.EC.EWAR) } } } } } Device (LID0) { Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x23, 0x04 }) Method (_LID, 0, NotSerialized) // _LID: Lid Status { Return (LIDS) } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (\_SB.PCI0.LPCB.EC.ECOK) { If (Arg0) { Store (0x01, \_SB.PCI0.LPCB.EC.EWLO) } Else { Store (0x00, \_SB.PCI0.LPCB.EC.EWLO) } } } } Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) // _HID: Hardware ID } } Scope (\_PR) { Processor (CPU0, 0x01, 0x00000410, 0x06) {} Processor (CPU1, 0x02, 0x00000410, 0x06) {} Processor (CPU2, 0x03, 0x00000410, 0x06) {} Processor (CPU3, 0x04, 0x00000410, 0x06) {} Processor (CPU4, 0x05, 0x00000410, 0x06) {} Processor (CPU5, 0x06, 0x00000410, 0x06) {} Processor (CPU6, 0x07, 0x00000410, 0x06) {} Processor (CPU7, 0x08, 0x00000410, 0x06) {} } Mutex (MUTX, 0x00) OperationRegion (PRT0, SystemIO, 0x80, 0x04) Field (PRT0, DWordAcc, Lock, Preserve) { P80H, 32 } OperationRegion (PLMT, SystemIO, 0x0310, 0x0A) Field (PLMT, WordAcc, Lock, Preserve) { CPLT, 8, GPLT, 4, Offset (0x02), MPLT, 8, CFIL, 8 } Method (P8XH, 2, Serialized) { If (LEqual (Arg0, 0x00)) { Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) } If (LEqual (Arg0, 0x01)) { Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08) ), P80D) } If (LEqual (Arg0, 0x02)) { Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10) ), P80D) } If (LEqual (Arg0, 0x03)) { Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18) ), P80D) } Store (P80D, P80H) } OperationRegion (SPRT, SystemIO, 0xB2, 0x02) Field (SPRT, ByteAcc, Lock, Preserve) { SSMP, 8, SSMY, 8 } Method (\_PIC, 1, NotSerialized) // _PIC: Interrupt Model { Store (Arg0, GPIC) Store (Arg0, PICM) } Method (GETB, 3, Serialized) { Multiply (Arg0, 0x08, Local0) Multiply (Arg1, 0x08, Local1) CreateField (Arg2, Local0, Local1, TBF3) Return (TBF3) } Method (PNOT, 0, Serialized) { If (LGreater (TCNT, 0x01)) { If (And (PDC0, 0x08)) { Notify (\_PR.CPU0, 0x80) If (And (PDC0, 0x10)) { Sleep (0x64) Notify (\_PR.CPU0, 0x81) } } If (And (PDC1, 0x08)) { Notify (\_PR.CPU1, 0x80) If (And (PDC1, 0x10)) { Sleep (0x64) Notify (\_PR.CPU1, 0x81) } } If (And (PDC2, 0x08)) { Notify (\_PR.CPU2, 0x80) If (And (PDC2, 0x10)) { Sleep (0x64) Notify (\_PR.CPU2, 0x81) } } If (And (PDC3, 0x08)) { Notify (\_PR.CPU3, 0x80) If (And (PDC3, 0x10)) { Sleep (0x64) Notify (\_PR.CPU3, 0x81) } } If (And (PDC4, 0x08)) { Notify (\_PR.CPU4, 0x80) If (And (PDC4, 0x10)) { Sleep (0x64) Notify (\_PR.CPU4, 0x81) } } If (And (PDC5, 0x08)) { Notify (\_PR.CPU5, 0x80) If (And (PDC5, 0x10)) { Sleep (0x64) Notify (\_PR.CPU5, 0x81) } } If (And (PDC6, 0x08)) { Notify (\_PR.CPU6, 0x80) If (And (PDC6, 0x10)) { Sleep (0x64) Notify (\_PR.CPU6, 0x81) } } If (And (PDC7, 0x08)) { Notify (\_PR.CPU7, 0x80) If (And (PDC7, 0x10)) { Sleep (0x64) Notify (\_PR.CPU7, 0x81) } } } Else { Notify (\_PR.CPU0, 0x80) Sleep (0x64) Notify (\_PR.CPU0, 0x81) } } Method (TRAP, 2, Serialized) { Store (Arg1, SMIF) If (LEqual (Arg0, \TRTP)) { Store (0x00, TRP0) } If (LEqual (Arg0, \TRTD)) { Store (Arg1, DTSF) Store (0x00, TRPD) Return (DTSF) } If (LEqual (Arg0, \TRTI)) { Store (0x00, TRPH) } Return (SMIF) } Scope (\_SB) { Method (_INI, 0, NotSerialized) // _INI: Initialize { Store (0x01, UH2D) Store (0x01, UH3D) Store (0x01, UH4D) Store (0x01, UH6D) Store (0x01, UH7D) PINI () If (LNot (OSDW ())) { If (LAnd (LEqual (\_SB.PCI0.P0P2.UPSB.DSB2.UPS2.AVND, 0xFFFF), LEqual (\_SB.PCI0.P0P2.UPSB.DSB3.UPS2.AVND, 0xFFFF))) { Store (0x01, \_SB.PCI0.P0P2.LDIS) Sleep (0x07D0) Store (0x00, GP23) } } } Device (PNLF) { Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID Name (_CID, "backlight") // _CID: Compatible ID Name (_UID, 0x0E) // _UID: Unique ID Name (_STA, 0x0B) // _STA: Status } Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) // _HID: Hardware ID Name (_STA, 0x0B) // _STA: Status } } Scope (\_SB.PCI0) { Method (_INI, 0, NotSerialized) // _INI: Initialize { Store (0x07D0, OSYS) If (CondRefOf (\_OSI, Local0)) { If (_OSI ("Darwin")) { Store (0x2710, OSYS) } If (\_OSI ("Linux")) { Store (0x03E8, OSYS) } If (\_OSI ("Windows 2001")) { Store (0x07D1, OSYS) } If (\_OSI ("Windows 2001 SP1")) { Store (0x07D1, OSYS) } If (\_OSI ("Windows 2001 SP2")) { Store (0x07D2, OSYS) } If (\_OSI ("Windows 2006")) { Store (0x07D6, OSYS) } If (\_OSI ("Windows 2007")) { Store (0x07D7, OSYS) } If (\_OSI ("Windows 2008")) { Store (0x07D8, OSYS) } If (\_OSI ("Windows 2009")) { Store (0x07D9, OSYS) } } } Method (NHPG, 0, Serialized) { } Method (NPME, 0, Serialized) { } } Scope (\) { Name (PICM, 0x00) Method (OSDW, 0, NotSerialized) { If (LEqual (OSYS, 0x2710)) { Return (0x01) } Else { Return (0x00) } } Method (PINI, 0, NotSerialized) { If (CondRefOf (_OSI, Local0)) { If (_OSI ("Darwin")) { Store (0x2710, OSYS) } Else { If (_OSI ("Linux")) { Store (0x03E8, OSYS) } Else { If (_OSI ("Windows 2009")) { Store (0x07D9, OSYS) } Else { If (_OSI ("Windows 2006")) { Store (0x07D6, OSYS) } Else { If (_OSI ("Windows 2001 SP2")) { Store (0x07D2, OSYS) } Else { If (_OSI ("Windows 2001 SP1")) { Store (0x07D1, OSYS) } Else { If (_OSI ("Windows 2001")) { Store (0x07D1, OSYS) } } } } } } } } Else { Store (0x07D0, OSYS) } } } Scope (\_SB.PCI0) { Device (PDRC) { Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID Name (_UID, 0x01) // _UID: Unique ID Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y17) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00008000, // Address Length _Y19) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y1A) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y1B) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y1C) Memory32Fixed (ReadWrite, 0xFED20000, // Address Base 0x00020000, // Address Length ) Memory32Fixed (ReadOnly, 0xFED90000, // Address Base 0x00004000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED45000, // Address Base 0x0004B000, // Address Length ) Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) Memory32Fixed (ReadOnly, 0xFEE00000, // Address Base 0x00100000, // Address Length ) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y18) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y17._BAS, RBR0) // _BAS: Base Address ShiftLeft (\_SB.PCI0.LPCB.RCBA, 0x0E, RBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y18._BAS, TBR0) // _BAS: Base Address Store (TBAB, TBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y18._LEN, TBLN) // _LEN: Length If (LEqual (TBAB, 0x00)) { Store (0x00, TBLN) } CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y19._BAS, MBR0) // _BAS: Base Address ShiftLeft (\_SB.PCI0.MHBR, 0x0F, MBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1A._BAS, DBR0) // _BAS: Base Address ShiftLeft (\_SB.PCI0.DIBR, 0x0C, DBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1B._BAS, EBR0) // _BAS: Base Address ShiftLeft (\_SB.PCI0.EPBR, 0x0C, EBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1C._BAS, XBR0) // _BAS: Base Address ShiftLeft (\_SB.PCI0.PXBR, 0x1A, XBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1C._LEN, XSZ0) // _LEN: Length ShiftRight (0x10000000, \_SB.PCI0.PXSZ, XSZ0) Return (BUF0) } } } Scope (\) { OperationRegion (IO_T, SystemIO, 0x1000, 0x10) Field (IO_T, ByteAcc, NoLock, Preserve) { TRPI, 16, Offset (0x04), Offset (0x06), Offset (0x08), TRP0, 8, Offset (0x0A), Offset (0x0B), Offset (0x0C), Offset (0x0D), Offset (0x0E), Offset (0x0F), Offset (0x10) } OperationRegion (IO_D, SystemIO, 0x0810, 0x04) Field (IO_D, ByteAcc, NoLock, Preserve) { TRPD, 8 } OperationRegion (IO_H, SystemIO, 0x1000, 0x04) Field (IO_H, ByteAcc, NoLock, Preserve) { TRPH, 8 } OperationRegion (PMIO, SystemIO, \PMBS, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset (0x20), , 1, , 1, SPST, 1, , 3, , 6, , 1, , 1, Offset (0x22), , 9, GS09, 1, , 3, GS13, 1, Offset (0x24), , 3, , 1, Offset (0x28), , 1, , 2, , 3, , 6, , 1, , 1, Offset (0x2A), , 9, GE09, 1, , 3, GE13, 1, Offset (0x2C), , 3, , 1, Offset (0x30), Offset (0x42), , 1, GPEC, 1, , 1, Offset (0x43), Offset (0x64), , 4, , 3, , 2, SCIS, 1, , 4, Offset (0x66) } OperationRegion (GPIO, SystemIO, \GPBS, 0x64) Field (GPIO, ByteAcc, NoLock, Preserve) { , 5, GU05, 1, Offset (0x01), GUV1, 8, GUV2, 8, GUV3, 8, GD00, 4, GD04, 1, , 7, GD12, 1, Offset (0x08), Offset (0x0C), , 3, GP03, 1, GP04, 1, GP05, 1, GP06, 1, Offset (0x0D), , 4, GP12, 1, GP13, 1, Offset (0x0E), GP16, 1, GP17, 1, GP18, 1, GP19, 1, GP20, 1, GP21, 1, GP22, 1, GP23, 1, , 3, GP27, 1, GP28, 1, Offset (0x10), Offset (0x18), GB00, 8, GB01, 8, GB02, 8, GB03, 8, Offset (0x2C), , 3, GI03, 1, GI04, 1, GI05, 1, GI06, 1, Offset (0x2D), GIV1, 8, GIV2, 8, GIV3, 8, GUV4, 8, GUV5, 8, GUV6, 8, GUV7, 8, GIO4, 8, GI40, 1, GI41, 1, GI42, 1, , 3, GI46, 1, Offset (0x36), GIO6, 8, , 3, GI59, 1, Offset (0x38), , 4, GP36, 1, Offset (0x39), GP40, 1, GP41, 1, GP42, 1, , 2, GP45, 1, GP46, 1, Offset (0x3A), GP48, 1, GP49, 1, GL06, 6, , 3, GP59, 1, Offset (0x3C), Offset (0x40), GUV8, 8, GUV9, 8, GUVA, 8, GUVB, 8, GIO8, 4, GI68, 1, GI69, 1, Offset (0x45), GIO9, 8, GIOA, 8, GIOB, 8, GP64, 1, , 3, GP68, 1, GP69, 1, GL08, 2, GL09, 8, GL0A, 8, GL0B, 8 } OperationRegion (RCRB, SystemMemory, \SRCB, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x1000), Offset (0x3000), Offset (0x3404), HPAS, 2, , 5, HPAE, 1, Offset (0x3418), , 1, , 1, SATD, 1, SMBD, 1, HDAD, 1, , 2, UH6D, 1, UH1D, 1, UH2D, 1, UH3D, 1, UH4D, 1, UH5D, 1, Offset (0x341A), RP1D, 1, RP2D, 1, RP3D, 1, RP4D, 1, RP5D, 1, RP6D, 1, RP7D, 1, RP8D, 1, , 4, UH7D, 1 } } Scope (\_GPE) { Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Store (0x20, \_SB.PCI0.SBUS.HSTS) } Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PCI0.P0P2, 0x02) Notify (\_SB.PCI0.RP02.ARPT, 0x02) Notify (\_SB.PCI0.P0P2, 0x02) } Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Notify (\_SB.PWRB, 0x02) Notify (\_SB.PCI0.EHC1, 0x02) Notify (\_SB.PCI0.EHC2, 0x02) If (OSDW ()) { Notify (\_SB.PCI0.HDEF, 0x02) } } } Method (DTGP, 5, NotSerialized) { If (LEqual (Arg0, Buffer (0x10) { /* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, /* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B })) { If (LEqual (Arg1, One)) { If (LEqual (Arg2, Zero)) { Store (Buffer (0x01) { 0x03 }, Arg4) Return (One) } If (LEqual (Arg2, One)) { Return (One) } } } Store (Buffer (0x01) { 0x00 }, Arg4) Return (Zero) } Name (_S0, Package (0x03) // _S0_: S0 System State { 0x00, 0x00, 0x00 }) Name (_S4, Package (0x03) // _S4_: S4 System State { 0x06, 0x06, 0x00 }) Name (_S5, Package (0x03) // _S5_: S5 System State { 0x07, 0x07, 0x00 }) Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { Store (0x00, P80D) P8XH (0x00, Arg0) Store (Arg0, \_SB.PCI0.LPCB.EC.ECSS) If (OSDW ()) {} Else { Store (0x01, GP45) } If (LAnd (LNot (OSDW ()), LEqual (Arg0, 0x04))) { Store (0x00, \_SB.PCI0.LPCB.EC.EWLO) Store (0x01, \_SB.PCI0.P0P2.LDIS) Sleep (0x07D0) Store (0x00, GP23) } } Method (_WAK, 1, NotSerialized) // _WAK: Wake { Store (0x01, UH2D) Store (0x01, UH3D) Store (0x01, UH4D) Store (0x01, UH6D) Store (0x01, UH7D) P8XH (0x00, 0x00) Store (0x00, \_SB.PCI0.LPCB.EC.ECSS) If (OSDW ()) {} Store (\_SB.PCI0.LPCB.EC.ELSW, LIDS) Store (\_SB.PCI0.LPCB.EC.ELSW, \_SB.PCI0.IGPU.CLID) Store (\_SB.PCI0.LPCB.EC.EACP, PWRS) If (LNot (OSDW ())) { Store (0x00, \_SB.PCI0.LPCB.EC.LWE0) Store (0x00, \_SB.PCI0.LPCB.EC.LWE1) Store (0x00, \_SB.PCI0.LPCB.EC.LWE2) Store (0x00, \_SB.PCI0.LPCB.EC.LWE3) } If (LAnd (LNot (OSDW ()), LEqual (Arg0, 0x04))) { \_SB.PCI0.EHC2.HRST (0x00) \_SB.PCI0.EHC2.HRST (0x01) } PNOT () Return (Package (0x02) { 0x00, 0x00 }) } Scope (\_SB.PCI0.SATA) { Device (PRT0) { Name (_ADR, 0xFFFF) // _ADR: Address Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data { Name (GBU0, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00 }) CreateByteField (GBU0, 0x00, GB00) CreateByteField (GBU0, 0x01, GB01) CreateByteField (GBU0, 0x02, GB02) CreateByteField (GBU0, 0x03, GB03) CreateByteField (GBU0, 0x04, GB04) CreateByteField (GBU0, 0x05, GB05) CreateByteField (GBU0, 0x06, GB06) If (LEqual (SizeOf (Arg0), 0x0200)) { CreateWordField (Arg0, 0x9C, W780) If (And (W780, 0x08)) { Store (0x10, GB00) Store (0x03, GB01) Store (0xEF, GB06) } Else { Store (0x90, GB00) Store (0x03, GB01) Store (0xEF, GB06) } } Store (GBU0, GTF0) } Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Return (GTF0) } } } Scope (\_SB.PCI0) { Device (UHC1) { Name (_ADR, 0x001D0000) // _ADR: Address Name (_STA, 0x0B) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { } } Device (UHC2) { Name (_ADR, 0x001D0001) // _ADR: Address Name (_STA, 0x09) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x01, UH2D) } } Device (UHC3) { Name (_ADR, 0x001D0002) // _ADR: Address Name (_STA, 0x09) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x01, UH3D) } } Device (UHC4) { Name (_ADR, 0x001D0003) // _ADR: Address Name (_STA, 0x09) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x01, UH4D) } } Device (UHC5) { Name (_ADR, 0x001A0000) // _ADR: Address Name (_STA, 0x0B) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { } } Device (UHC6) { Name (_ADR, 0x001A0001) // _ADR: Address Name (_STA, 0x09) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x01, UH6D) } } Device (UHC7) { Name (_ADR, 0x001A0002) // _ADR: Address Name (_STA, 0x09) // _STA: Status Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x01, UH7D) } } Device (EHC1) { Name (_ADR, 0x001D0007) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, 0x03 }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0B) { "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0898, "AAPL,current-extra-in-sleep", 0x0640, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", 0x02, Buffer (0x01) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x03) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x03) } Method (HRST, 1, Serialized) { If (LEqual (Arg0, 0x01)) { Store (Arg0, GI40) } Else { If (LEqual (Arg0, 0x00)) { Store (Arg0, GP40) Store (Arg0, GI40) } } } Method (SRST, 1, Serialized) { If (LEqual (Arg0, 0x01)) { Store (0x00, GI41) Store (0x01, GP41) } Else { If (LEqual (Arg0, 0x00)) { Store (0x01, GI41) } } } Device (RHUB) { Name (_ADR, 0x00) // _ADR: Address Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (OSDW ()) } Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x00, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0x00, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0x00, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } } Device (EHC2) { Name (_ADR, 0x001A0007) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, 0x03 }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0B) { "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0898, "AAPL,current-extra-in-sleep", 0x0640, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", 0x06, Buffer (0x01) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x03) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x03) } Method (HRST, 1, Serialized) { If (LEqual (Arg0, 0x01)) { Store (Arg0, GI40) } Else { If (LEqual (Arg0, 0x00)) { Store (Arg0, GP40) Store (Arg0, GI40) } } } Device (RHUB) { Name (_ADR, 0x00) // _ADR: Address Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x00, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0x00, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, 0x00, 0x00 }) Name (_PLD, Package (0x10) // _PLD: Physical Location of Device { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (0x00) } } } } } Scope (\_SB.PCI0.HDEF) { OperationRegion (HDAR, PCI_Config, 0x00, 0x60) Field (HDAR, WordAcc, NoLock, Preserve) { VID0, 16, DID0, 16, Offset (0x4C), DCKA, 1, Offset (0x4D), DCKM, 1, , 6, DCKS, 1, Offset (0x54), , 15, PMES, 1 } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg0, Buffer (0x10) { /* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, /* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B })) { If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF)) { Store (Package (0x02) { "hda-gfx", Buffer (0x0A) { "onboard-1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Return (0x00) } } Scope (\_SB.PCI0.IGPU) { OperationRegion (GFXH, PCI_Config, 0x00, 0x40) Field (GFXH, ByteAcc, NoLock, Preserve) { VID0, 16, DID0, 16 } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg0, Buffer (0x10) { /* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, /* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B })) { If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF)) { Store (Package (0x02) { "hda-gfx", Buffer (0x0A) { "onboard-1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Return (0x00) } } Name (_S3, Package (0x03) // _S3_: S3 System State { 0x05, 0x05, 0x00 }) Scope (\_SB.PCI0.IGPU) { Method (PCPC, 0, NotSerialized) { } Method (PAPR, 0, NotSerialized) { Return (0x00) } Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching { Store (And (Arg0, 0x07), DSEN) If (LEqual (And (Arg0, 0x03), 0x00)) { If (CondRefOf (HDOS)) { HDOS () } } } Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices { If (CondRefOf (IDAB)) {} Else { Store (0x00, NDID) If (LNotEqual (DIDL, Zero)) { Store (SDDL (DIDL), DID1) } If (LNotEqual (DDL2, Zero)) { Store (SDDL (DDL2), DID2) } If (LNotEqual (DDL3, Zero)) { Store (SDDL (DDL3), DID3) } If (LNotEqual (DDL4, Zero)) { Store (SDDL (DDL4), DID4) } If (LNotEqual (DDL5, Zero)) { Store (SDDL (DDL5), DID5) } If (LNotEqual (DDL6, Zero)) { Store (SDDL (DDL6), DID6) } If (LNotEqual (DDL7, Zero)) { Store (SDDL (DDL7), DID7) } If (LNotEqual (DDL8, Zero)) { Store (SDDL (DDL8), DID8) } } If (LEqual (NDID, 0x01)) { Name (TMP1, Package (0x01) { 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP1, 0x00)) Return (TMP1) } If (LEqual (NDID, 0x02)) { Name (TMP2, Package (0x02) { 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP2, 0x00)) Store (Or (0x00010000, DID2), Index (TMP2, 0x01)) Return (TMP2) } If (LEqual (NDID, 0x03)) { Name (TMP3, Package (0x03) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP3, 0x00)) Store (Or (0x00010000, DID2), Index (TMP3, 0x01)) Store (Or (0x00010000, DID3), Index (TMP3, 0x02)) Return (TMP3) } If (LEqual (NDID, 0x04)) { Name (TMP4, Package (0x04) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP4, 0x00)) Store (Or (0x00010000, DID2), Index (TMP4, 0x01)) Store (Or (0x00010000, DID3), Index (TMP4, 0x02)) Store (Or (0x00010000, DID4), Index (TMP4, 0x03)) Return (TMP4) } If (LEqual (NDID, 0x05)) { Name (TMP5, Package (0x05) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP5, 0x00)) Store (Or (0x00010000, DID2), Index (TMP5, 0x01)) Store (Or (0x00010000, DID3), Index (TMP5, 0x02)) Store (Or (0x00010000, DID4), Index (TMP5, 0x03)) Store (Or (0x00010000, DID5), Index (TMP5, 0x04)) Return (TMP5) } If (LEqual (NDID, 0x06)) { Name (TMP6, Package (0x06) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP6, 0x00)) Store (Or (0x00010000, DID2), Index (TMP6, 0x01)) Store (Or (0x00010000, DID3), Index (TMP6, 0x02)) Store (Or (0x00010000, DID4), Index (TMP6, 0x03)) Store (Or (0x00010000, DID5), Index (TMP6, 0x04)) Store (Or (0x00010000, DID6), Index (TMP6, 0x05)) Return (TMP6) } If (LEqual (NDID, 0x07)) { Name (TMP7, Package (0x07) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP7, 0x00)) Store (Or (0x00010000, DID2), Index (TMP7, 0x01)) Store (Or (0x00010000, DID3), Index (TMP7, 0x02)) Store (Or (0x00010000, DID4), Index (TMP7, 0x03)) Store (Or (0x00010000, DID5), Index (TMP7, 0x04)) Store (Or (0x00010000, DID6), Index (TMP7, 0x05)) Store (Or (0x00010000, DID7), Index (TMP7, 0x06)) Return (TMP7) } If (LEqual (NDID, 0x08)) { Name (TMP8, Package (0x08) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP8, 0x00)) Store (Or (0x00010000, DID2), Index (TMP8, 0x01)) Store (Or (0x00010000, DID3), Index (TMP8, 0x02)) Store (Or (0x00010000, DID4), Index (TMP8, 0x03)) Store (Or (0x00010000, DID5), Index (TMP8, 0x04)) Store (Or (0x00010000, DID6), Index (TMP8, 0x05)) Store (Or (0x00010000, DID7), Index (TMP8, 0x06)) Store (Or (0x00010000, DID8), Index (TMP8, 0x07)) Return (TMP8) } Return (Package (0x01) { 0x0400 }) } Device (DD01) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID1, 0x00)) { Return (0x01) } Else { Return (And (0xFFFF, DID1)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { Return (CDDS (DID1)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD1) } Return (NDDS (DID1)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD02) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID2, 0x00)) { Return (0x02) } Else { Return (And (0xFFFF, DID2)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (LIDS, 0x00)) { Return (0x00) } Return (CDDS (DID2)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD2) } Return (NDDS (DID2)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels { Return (Package (0x12) { 0x50, 0x2F, 0x00, 0x07, 0x0D, 0x14, 0x1B, 0x21, 0x28, 0x2F, 0x35, 0x3C, 0x43, 0x49, 0x50, 0x57, 0x5D, 0x64 }) } Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method { If (LAnd (LGreaterEqual (Arg0, 0x00), LLessEqual (Arg0, 0x64))) { \_SB.PCI0.IGPU.AINT (0x01, Arg0) Store (Arg0, BRTL) } } Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current { Return (BRTL) } } Device (DD03) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID3, 0x00)) { Return (0x03) } Else { Return (And (0xFFFF, DID3)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID3, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID3)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD3) } Return (NDDS (DID3)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD04) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID4, 0x00)) { Return (0x04) } Else { Return (And (0xFFFF, DID4)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID4, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID4)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD4) } Return (NDDS (DID4)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD05) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID5, 0x00)) { Return (0x05) } Else { Return (And (0xFFFF, DID5)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID5, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID5)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD5) } Return (NDDS (DID5)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD06) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID6, 0x00)) { Return (0x06) } Else { Return (And (0xFFFF, DID6)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID6, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID6)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD6) } Return (NDDS (DID6)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD07) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID7, 0x00)) { Return (0x07) } Else { Return (And (0xFFFF, DID7)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID7, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID7)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD7) } Return (NDDS (DID7)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD08) { Method (_ADR, 0, Serialized) // _ADR: Address { If (LEqual (DID8, 0x00)) { Return (0x08) } Else { Return (And (0xFFFF, DID8)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If (LEqual (DID8, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID8)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If (CondRefOf (SNXD)) { Return (NXD8) } Return (NDDS (DID8)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Method (SDDL, 1, NotSerialized) { Increment (NDID) Store (And (Arg0, 0x0F0F), Local0) Or (0x80000000, Local0, Local1) If (LEqual (DIDL, Local0)) { Return (Local1) } If (LEqual (DDL2, Local0)) { Return (Local1) } If (LEqual (DDL3, Local0)) { Return (Local1) } If (LEqual (DDL4, Local0)) { Return (Local1) } If (LEqual (DDL5, Local0)) { Return (Local1) } If (LEqual (DDL6, Local0)) { Return (Local1) } If (LEqual (DDL7, Local0)) { Return (Local1) } If (LEqual (DDL8, Local0)) { Return (Local1) } Return (0x00) } Method (CDDS, 1, NotSerialized) { Store (And (Arg0, 0x0F0F), Local0) If (LEqual (0x00, Local0)) { Return (0x1D) } If (LEqual (CADL, Local0)) { Return (0x1F) } If (LEqual (CAL2, Local0)) { Return (0x1F) } If (LEqual (CAL3, Local0)) { Return (0x1F) } If (LEqual (CAL4, Local0)) { Return (0x1F) } If (LEqual (CAL5, Local0)) { Return (0x1F) } If (LEqual (CAL6, Local0)) { Return (0x1F) } If (LEqual (CAL7, Local0)) { Return (0x1F) } If (LEqual (CAL8, Local0)) { Return (0x1F) } Return (0x1D) } Method (NDDS, 1, NotSerialized) { Store (And (Arg0, 0x0F0F), Local0) If (LEqual (0x00, Local0)) { Return (0x00) } If (LEqual (NADL, Local0)) { Return (0x01) } If (LEqual (NDL2, Local0)) { Return (0x01) } If (LEqual (NDL3, Local0)) { Return (0x01) } If (LEqual (NDL4, Local0)) { Return (0x01) } If (LEqual (NDL5, Local0)) { Return (0x01) } If (LEqual (NDL6, Local0)) { Return (0x01) } If (LEqual (NDL7, Local0)) { Return (0x01) } If (LEqual (NDL8, Local0)) { Return (0x01) } Return (0x00) } Scope (\_SB.PCI0) { OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) Field (MCHP, AnyAcc, NoLock, Preserve) { Offset (0x60), TASM, 10, Offset (0x62) } } OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) Field (IGDP, AnyAcc, NoLock, Preserve) { Offset (0x12), , 1, GIVD, 1, , 2, GUMA, 3, Offset (0x14), , 4, GMFN, 1, Offset (0x18), Offset (0xA4), ASLE, 8, Offset (0xA8), GSSE, 1, GSSB, 14, GSES, 1, Offset (0xB0), , 12, CDVL, 1, Offset (0xB2), Offset (0xB5), LBPC, 8, Offset (0xBC), ASLS, 32 } OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) Field (IGDM, AnyAcc, NoLock, Preserve) { SIGN, 128, SIZE, 32, OVER, 32, SVER, 256, VVER, 128, GVER, 128, MBOX, 32, DMOD, 32, Offset (0x100), DRDY, 32, CSTS, 32, CEVT, 32, Offset (0x120), DIDL, 32, DDL2, 32, DDL3, 32, DDL4, 32, DDL5, 32, DDL6, 32, DDL7, 32, DDL8, 32, CPDL, 32, CPL2, 32, CPL3, 32, CPL4, 32, CPL5, 32, CPL6, 32, CPL7, 32, CPL8, 32, CADL, 32, CAL2, 32, CAL3, 32, CAL4, 32, CAL5, 32, CAL6, 32, CAL7, 32, CAL8, 32, NADL, 32, NDL2, 32, NDL3, 32, NDL4, 32, NDL5, 32, NDL6, 32, NDL7, 32, NDL8, 32, ASLP, 32, TIDX, 32, CHPD, 32, CLID, 32, CDCK, 32, SXSW, 32, EVTS, 32, CNOT, 32, NRDY, 32, Offset (0x200), SCIE, 1, GEFC, 4, GXFC, 3, GESF, 8, Offset (0x204), PARM, 32, DSLP, 32, Offset (0x300), ARDY, 32, ASLC, 32, TCHE, 32, ALSI, 32, BCLP, 32, PFIT, 32, CBLV, 32, BCLM, 320, CPFM, 32, EPFM, 32, PLUT, 592, PFMB, 32, CCDV, 32, PCFT, 32, Offset (0x400), GVD1, 49152, PHED, 32, BDDC, 2048 } Name (DBTB, Package (0x15) { 0x00, 0x07, 0x38, 0x01C0, 0x0E00, 0x3F, 0x01C7, 0x0E07, 0x01F8, 0x0E38, 0x0FC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7000, 0x7007, 0x7038, 0x71C0, 0x7E00 }) Name (CDCT, Package (0x05) { Package (0x02) { 0xE4, 0x0140 }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { 0x00, 0x00 }, Package (0x02) { 0xDE, 0x014D } }) Name (SUCC, 0x01) Name (NVLD, 0x02) Name (CRIT, 0x04) Name (NCRT, 0x06) Method (GSCI, 0, Serialized) { Method (GBDA, 0, Serialized) { If (LEqual (GESF, 0x00)) { Store (0x0679, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x01)) { Store (0x0240, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x04)) { And (PARM, 0xEFFF0000, PARM) And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), PARM) Or (IBTT, PARM, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x05)) { Store (IPSC, PARM) Or (PARM, ShiftLeft (IPAT, 0x08), PARM) Add (PARM, 0x0100, PARM) Or (PARM, ShiftLeft (LIDS, 0x10), PARM) Add (PARM, 0x00010000, PARM) Or (PARM, ShiftLeft (IBIA, 0x14), PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x06)) { Store (ITVF, PARM) Or (PARM, ShiftLeft (ITVM, 0x04), PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x07)) { Store (GIVD, PARM) XOr (PARM, 0x01, PARM) Or (PARM, ShiftLeft (GMFN, 0x01), PARM) Or (PARM, ShiftLeft (0x03, 0x0B), PARM) Or (PARM, ShiftLeft (IDMS, 0x11), PARM) Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL )), 0x15), PARM, PARM) Store (0x01, GESF) Return (SUCC) } If (LEqual (GESF, 0x0A)) { Store (0x00, PARM) If (ISSC) { Or (PARM, 0x03, PARM) } Store (0x00, GESF) Return (SUCC) } If (LEqual (GESF, 0x0B)) { Store (KSV0, PARM) Store (KSV1, GESF) Return (SUCC) } Store (Zero, GESF) Return (CRIT) } Method (SBCB, 0, Serialized) { If (LEqual (GESF, 0x00)) { Store (0x00, PARM) Store (0x000F87FD, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x01)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x03)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x04)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x05)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x06)) { Store (And (PARM, 0x0F), ITVF) Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x07)) { If (LEqual (PARM, 0x00)) { Store (CLID, Local0) If (And (0x80000000, Local0)) { And (CLID, 0x0F, CLID) GLID (CLID) } } Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x08)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x09)) { And (PARM, 0xFF, IBTT) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x0A)) { And (PARM, 0xFF, IPSC) If (And (ShiftRight (PARM, 0x08), 0xFF)) { And (ShiftRight (PARM, 0x08), 0xFF, IPAT) Decrement (IPAT) } And (ShiftRight (PARM, 0x14), 0x07, IBIA) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x0B)) { And (ShiftRight (PARM, 0x01), 0x01, IF1E) If (And (PARM, ShiftLeft (0x0F, 0x0D))) { And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) } Else { And (ShiftRight (PARM, 0x11), 0x0F, IDMS) } Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x10)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x11)) { Store (ShiftLeft (LIDS, 0x08), PARM) Add (PARM, 0x0100, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x12)) { If (And (PARM, 0x01)) { If (LEqual (ShiftRight (PARM, 0x01), 0x01)) { Store (0x01, ISSC) } Else { Store (Zero, GESF) Return (CRIT) } } Else { Store (0x00, ISSC) } Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x13)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x14)) { And (PARM, 0x0F, PAVP) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } Store (Zero, GESF) Return (SUCC) } If (LEqual (GEFC, 0x04)) { Store (GBDA (), GXFC) } If (LEqual (GEFC, 0x06)) { Store (SBCB (), GXFC) } Store (0x00, GEFC) Store (0x01, SCIS) Store (0x00, GSSE) Store (0x00, SCIE) Return (Zero) } Method (PDRD, 0, NotSerialized) { If (LNot (DRDY)) { Sleep (ASLP) } Return (LNot (DRDY)) } Method (PSTS, 0, NotSerialized) { If (LGreater (CSTS, 0x02)) { Sleep (ASLP) } Return (LEqual (CSTS, 0x03)) } Method (GNOT, 2, NotSerialized) { If (PDRD ()) { Return (0x01) } Store (Arg0, CEVT) Store (0x03, CSTS) If (LAnd (LEqual (CHPD, 0x00), LEqual (Arg1, 0x00))) { If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6))) { Notify (\_SB.PCI0, Arg1) } Else { Notify (\_SB.PCI0.IGPU, Arg1) } } If (CondRefOf (HNOT)) { HNOT (Arg0) } Else { Notify (\_SB.PCI0.IGPU, 0x80) } Return (0x00) } Method (GHDS, 1, NotSerialized) { Store (Arg0, TIDX) Return (GNOT (0x01, 0x00)) } Method (GLID, 1, NotSerialized) { If (LEqual (Arg0, 0x01)) { Store (0x03, CLID) } Else { Store (Arg0, CLID) } Return (GNOT (0x02, 0x00)) } Method (GDCK, 1, NotSerialized) { Store (Arg0, CDCK) Return (GNOT (0x04, 0x00)) } Method (PARD, 0, NotSerialized) { If (LNot (ARDY)) { Sleep (ASLP) } Return (LNot (ARDY)) } Method (AINT, 2, NotSerialized) { If (LNot (And (TCHE, ShiftLeft (0x01, Arg0)))) { Return (0x01) } If (PARD ()) { Return (0x01) } If (LEqual (Arg0, 0x02)) { If (CPFM) { And (CPFM, 0x0F, Local0) And (EPFM, 0x0F, Local1) If (LEqual (Local0, 0x01)) { If (And (Local1, 0x06)) { Store (0x06, PFIT) } Else { If (And (Local1, 0x08)) { Store (0x08, PFIT) } Else { Store (0x01, PFIT) } } } If (LEqual (Local0, 0x06)) { If (And (Local1, 0x08)) { Store (0x08, PFIT) } Else { If (And (Local1, 0x01)) { Store (0x01, PFIT) } Else { Store (0x06, PFIT) } } } If (LEqual (Local0, 0x08)) { If (And (Local1, 0x01)) { Store (0x01, PFIT) } Else { If (And (Local1, 0x06)) { Store (0x06, PFIT) } Else { Store (0x08, PFIT) } } } } Else { XOr (PFIT, 0x07, PFIT) } Or (PFIT, 0x80000000, PFIT) Store (0x04, ASLC) } Else { If (LEqual (Arg0, 0x01)) { Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP) Or (BCLP, 0x80000000, BCLP) Store (0x02, ASLC) } Else { If (LEqual (Arg0, 0x00)) { Store (Arg1, ALSI) Store (0x01, ASLC) } Else { Return (0x01) } } } Store (0x01, ASLE) Return (0x00) } Method (SCIP, 0, NotSerialized) { If (LNotEqual (OVER, 0x00)) { Return (LNot (GSMI)) } Return (0x00) } Device (\_SB.MEM2) { Name (_HID, EisaId ("PNP0C01")) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x20000000, // Address Base 0x00200000, // Address Length ) Memory32Fixed (ReadWrite, 0x40000000, // Address Base 0x00200000, // Address Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (CRS) } } } Scope (\_PR.CPU0) { Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites { Return (CPLT) } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000199, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000198, // Address ,) } }) Name (_PSS, Package (0x0B) // _PSS: Performance Supported States { Package (0x06) { 0x000006A5, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x000006A4, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x0000571F, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000050A1, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004A44, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004409, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x00003DF0, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x000037FA, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x00003222, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002C6A, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x000027AA, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (APSS, Package (0x14) { Package (0x06) { 0x00000A8C, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001B00, 0x00001B00 }, Package (0x06) { 0x00000A28, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001A00, 0x00001A00 }, Package (0x06) { 0x000009C4, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001900, 0x00001900 }, Package (0x06) { 0x00000960, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001800, 0x00001800 }, Package (0x06) { 0x000008FC, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001700, 0x00001700 }, Package (0x06) { 0x00000898, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x00000834, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001500, 0x00001500 }, Package (0x06) { 0x000007D0, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x00000708, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001200, 0x00001200 }, Package (0x06) { 0x000006A4, 0x00005DC0, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x00000640, 0x0000571F, 0x0000000A, 0x0000000A, 0x00001000, 0x00001000 }, Package (0x06) { 0x000005DC, 0x000050A1, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000578, 0x00004A44, 0x0000000A, 0x0000000A, 0x00000E00, 0x00000E00 }, Package (0x06) { 0x00000514, 0x00004409, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x00003DF0, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x0000044C, 0x000037FA, 0x0000000A, 0x0000000A, 0x00000B00, 0x00000B00 }, Package (0x06) { 0x000003E8, 0x00003222, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000384, 0x00002C6A, 0x0000000A, 0x0000000A, 0x00000900, 0x00000900 }, Package (0x06) { 0x00000320, 0x000027AA, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Name (APSN, 0x0A) Name (PSDF, 0x00) Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If (LNot (PSDF)) { Store (TCNT, Index (DerefOf (Index (HPSD, 0x00)), 0x04)) Store (TCNT, Index (DerefOf (Index (SPSD, 0x00)), 0x04)) Store (Ones, PSDF) } If (And (PDC0, 0x0800)) { Return (HPSD) } Return (SPSD) } Name (HPSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFE, 0x80 } }) Name (SPSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFC, 0x80 } }) } Scope (\) { Name (SSDT, Package (0x0C) { "CPU0IST ", 0x8AD3B890, 0x00000506, "APIST ", 0x8AD3A710, 0x000003A4, "CPU0CST ", 0x8AD39190, 0x00000781, "APCST ", 0x8AD38D90, 0x00000119 }) Name (CFGD, 0x00181EFF) Name (\PDC0, 0x80000000) Name (\PDC1, 0x80000000) Name (\PDC2, 0x80000000) Name (\PDC3, 0x80000000) Name (\PDC4, 0x80000000) Name (\PDC5, 0x80000000) Name (\PDC6, 0x80000000) Name (\PDC7, 0x80000000) Name (\SDTL, 0x00) } Scope (\_PR.CPU0) { Name (HI0, 0x00) Name (HC0, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (CPDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, REVS) CreateDWordField (Arg0, 0x04, SIZE) Store (SizeOf (Arg0), Local0) Store (Subtract (Local0, 0x08), Local1) CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) Concatenate (STS0, TEMP, Local2) Return (COSC (Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }, REVS, SIZE, Local2)) } Method (COSC, 4, NotSerialized) { CreateDWordField (Arg3, 0x00, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, 0x00, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }) CreateDWordField (UID0, 0x00, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3))))) { Store (0x06, STS0) Return (Arg3) } If (LNotEqual (Arg1, 0x01)) { Store (0x0A, STS0) Return (Arg3) } Return (Arg3) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS0) CreateDWordField (Arg0, 0x04, CAP0) If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A))) { Return (Zero) } If (And (STS0, 0x01)) { And (CAP0, 0x0BFF, CAP0) Return (Zero) } Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0) If (And (CFGD, 0x3E)) { If (LAnd (LAnd (And (CFGD, 0x0400), And (PDC0, 0x18 )), LNot (And (SDTL, 0x02)))) { Or (SDTL, 0x02, SDTL) OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08 ))) Load (CST0, HC0) } } Return (Zero) } } Scope (\_PR.CPU1) { Name (HI1, 0x00) Name (HC1, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS1) CreateDWordField (Arg0, 0x04, CAP1) If (LOr (LEqual (STS1, 0x06), LEqual (STS1, 0x0A))) { Return (Zero) } If (And (STS1, 0x01)) { And (CAP1, 0x0BFF, CAP1) Return (Zero) } Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1) If (LEqual (And (PDC0, 0x09), 0x09)) { APPT () } If (And (PDC0, 0x18)) { APCT () } Return (Zero) } Method (APCT, 0, NotSerialized) { If (LAnd (And (CFGD, 0x2E), LNot (And (SDTL, 0x20 )))) { Or (SDTL, 0x20, SDTL) OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B ))) Load (CST1, HC1) } } Method (APPT, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01), LNot (And (SDTL, 0x10 )))) { Or (SDTL, 0x10, SDTL) OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05 ))) Load (IST1, HI1) } } } Scope (\_PR.CPU2) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS2) CreateDWordField (Arg0, 0x04, CAP2) If (LOr (LEqual (STS2, 0x06), LEqual (STS2, 0x0A))) { Return (Zero) } If (And (STS2, 0x01)) { And (CAP2, 0x0BFF, CAP2) Return (Zero) } Or (And (PDC2, 0x7FFFFFFF), CAP2, PDC2) If (LEqual (And (PDC2, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC2, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU3) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS3) CreateDWordField (Arg0, 0x04, CAP3) If (LOr (LEqual (STS3, 0x06), LEqual (STS3, 0x0A))) { Return (Zero) } If (And (STS3, 0x01)) { And (CAP3, 0x0BFF, CAP3) Return (Zero) } Or (And (PDC3, 0x7FFFFFFF), CAP3, PDC3) If (LEqual (And (PDC3, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC3, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU4) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS4) CreateDWordField (Arg0, 0x04, CAP4) If (LOr (LEqual (STS4, 0x06), LEqual (STS4, 0x0A))) { Return (Zero) } If (And (STS4, 0x01)) { And (CAP4, 0x0BFF, CAP4) Return (Zero) } Or (And (PDC4, 0x7FFFFFFF), CAP4, PDC4) If (LEqual (And (PDC4, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC4, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU5) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS5) CreateDWordField (Arg0, 0x04, CAP5) If (LOr (LEqual (STS5, 0x06), LEqual (STS5, 0x0A))) { Return (Zero) } If (And (STS5, 0x01)) { And (CAP5, 0x0BFF, CAP5) Return (Zero) } Or (And (PDC5, 0x7FFFFFFF), CAP5, PDC5) If (LEqual (And (PDC5, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC5, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU6) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS6) CreateDWordField (Arg0, 0x04, CAP6) If (LOr (LEqual (STS6, 0x06), LEqual (STS6, 0x0A))) { Return (Zero) } If (And (STS6, 0x01)) { And (CAP6, 0x0BFF, CAP6) Return (Zero) } Or (And (PDC6, 0x7FFFFFFF), CAP6, PDC6) If (LEqual (And (PDC6, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC6, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU7) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Store (\_PR.CPU0.CPDC (Arg0), Local0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, STS7) CreateDWordField (Arg0, 0x04, CAP7) If (LOr (LEqual (STS7, 0x06), LEqual (STS7, 0x0A))) { Return (Zero) } If (And (STS7, 0x01)) { And (CAP7, 0x0BFF, CAP7) Return (Zero) } Or (And (PDC7, 0x7FFFFFFF), CAP7, PDC7) If (LEqual (And (PDC7, 0x09), 0x09)) { \_PR.CPU1.APPT () } If (And (PDC7, 0x18)) { \_PR.CPU1.APCT () } Return (Zero) } } Scope (\_PR.CPU0) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { If (And (PDC0, 0x04)) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Return (Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x05, // Bit Width 0x00, // Bit Offset 0x0000000000000410, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x05, // Bit Width 0x00, // Bit Offset 0x0000000000000410, // Address ,) } }) } Name (TSMF, Package (0x0F) { Package (0x05) { 0x64, 0x03E8, 0x00, 0x00, 0x00 }, Package (0x05) { 0x5E, 0x03AC, 0x00, 0x1F, 0x00 }, Package (0x05) { 0x58, 0x0370, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x52, 0x0334, 0x00, 0x1D, 0x00 }, Package (0x05) { 0x4B, 0x02F8, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x45, 0x02BC, 0x00, 0x1B, 0x00 }, Package (0x05) { 0x3F, 0x0280, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x39, 0x0244, 0x00, 0x19, 0x00 }, Package (0x05) { 0x32, 0x0208, 0x00, 0x18, 0x00 }, Package (0x05) { 0x2C, 0x01CC, 0x00, 0x17, 0x00 }, Package (0x05) { 0x26, 0x0190, 0x00, 0x16, 0x00 }, Package (0x05) { 0x20, 0x0154, 0x00, 0x15, 0x00 }, Package (0x05) { 0x19, 0x0118, 0x00, 0x14, 0x00 }, Package (0x05) { 0x13, 0xDC, 0x00, 0x13, 0x00 }, Package (0x05) { 0x0D, 0xA0, 0x00, 0x12, 0x00 } }) Name (TSMC, Package (0x08) { Package (0x05) { 0x64, 0x03E8, 0x00, 0x00, 0x00 }, Package (0x05) { 0x58, 0x036B, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x4B, 0x02EE, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x3F, 0x0271, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x32, 0x01F4, 0x00, 0x18, 0x00 }, Package (0x05) { 0x26, 0x0177, 0x00, 0x16, 0x00 }, Package (0x05) { 0x19, 0xFA, 0x00, 0x14, 0x00 }, Package (0x05) { 0x0D, 0x7D, 0x00, 0x12, 0x00 } }) Name (TSSF, 0x00) Mutex (TSMO, 0x00) Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (LAnd (LNot (TSSF), CondRefOf (_PSS))) { Acquire (TSMO, 0xFFFF) If (LAnd (LNot (TSSF), CondRefOf (_PSS))) { Name (LFMI, 0x00) Store (SizeOf (_PSS), LFMI) Decrement (LFMI) Name (LFMP, 0x00) Store (DerefOf (Index (DerefOf (Index (_PSS, LFMI)), 0x01)), LFMP) Store (0x00, Local0) If (And (CFGD, 0x00080000)) { Store (RefOf (TSMF), Local1) Store (SizeOf (TSMF), Local2) } Else { Store (RefOf (TSMC), Local1) Store (SizeOf (TSMC), Local2) } While (LLess (Local0, Local2)) { Store (Divide (Multiply (LFMP, Subtract (Local2, Local0)), Local2, ), Local4) Store (Local4, Index (DerefOf (Index (DerefOf (Local1), Local0)), 0x01 )) Increment (Local0) } Store (Ones, TSSF) } Release (TSMO) } If (And (CFGD, 0x00080000)) { Return (TSMF) } Else { Return (TSMC) } } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFC, TCNT } }) } } Scope (\_PR.CPU1) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x01, 0xFC, TCNT } }) } } Scope (\_PR.CPU2) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x02, 0xFC, TCNT } }) } } Scope (\_PR.CPU3) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x03, 0xFC, TCNT } }) } } Scope (\_PR.CPU4) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x04, 0xFC, TCNT } }) } } Scope (\_PR.CPU5) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x05, 0xFC, TCNT } }) } } Scope (\_PR.CPU6) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x06, 0xFC, TCNT } }) } } Scope (\_PR.CPU7) { Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies { If (LNot (And (PDC0, 0x04))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, TCNT } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x07, 0xFC, TCNT } }) } } }