Show pageOld revisionsBacklinksBack to top This page is read only. You can view the source, but not change it. Ask your administrator if you think this is wrong. Email from [[/JustinHibbits|JustinHibbits]]: The %%PowerPC%% 970 (G5), and IBM POWER5 and later have a very complex PMC subsystem. I added support for direct events a few years ago, but still haven't added indirect events, because the hwpmc(4) design isn't very conducive to it (I looked at doing some hacks for it, but the test matrix would be astronomical). Indirect events are handled by programming additional registers, and are system wide, meaning that all indirect events are on a multiplexed bus, and can only be monitored in compatible groupings (a bit difficult to explain, but I hope you can understand), such that they can't be mixed with just any other event, because of the bus programming. I hope this makes sense. I'd like to see hwpmc(4) extended in some way to handle "event groupings", or similar. This is possibly similar to the uncore programming (it's been a few years since I implemented uncore at %%NetApp%% for Haswell, so my memory of it is a little fuzzy), though %%PowerPC%% supports similar things to uncore (Apple Uninorth north bridge supports PMC, but it's completely undocumented, and Freescale %%SoCs%% support %%SoC%%-wide PMC). Perhaps we can plan to discuss this at the [[DevSummit/201606/PMC|PMC working group]] session. ---- {{tag>Historical}} devsummit/201606/pmc/indirect.txt Last modified: 2018/04/01 01:24by MarkLinimon